wangyuxiao2000 / ccsds-ldpc

Related projects ⓘ

Alternatives and complementary repositories for ccsds-ldpc

• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆44Updated 7 years ago
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆21Updated 3 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆11Updated 4 years ago
• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆11Updated 4 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆12Updated 4 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆44Updated 5 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆44Updated 7 months ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆53Updated last year
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆41Updated 6 years ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆36Updated 5 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆86Updated 4 months ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆16Updated 4 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• sainathiyer / Hardware-Implementation-of-Polar-Code-for-5G-Application-on-FPGA
  Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…
  ☆15Updated 3 years ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆22Updated 5 years ago
• ghaziiii / Digital-predistortion
  This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …
  ☆16Updated last year
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆30Updated 6 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆53Updated 2 months ago
• KevinHexin / FPGA-Bicubic-interpolation
  use Verilog HDL implemente bicubic interpolation in FPGA
  ☆18Updated 4 years ago
• echoPinkApple / bilinear
  Bilinear interpolation realizes image scaling based on FPGA
  ☆22Updated 4 years ago
• ucb-ee290c / fa18-modem
  LTE/WiFi/5G-NR SDR Transceiver
  ☆52Updated 5 years ago
• C-H-Chien / FPGA_SIFT-LES
  Integration of SIFT and LES Algorithms
  ☆11Updated 6 months ago
• shun6-6 / Tri_Eth_UDP_pro_stack
  基于FPGA的三速以太网UDP协议栈设计
  ☆18Updated 7 months ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆24Updated 10 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆40Updated 3 years ago
• JoseIuri / axi4lite2uart
  This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.
  ☆16Updated 6 years ago
• zlijingtao / Digital-Calibration-of-SAR-ADC
  Successive Approximation Register (SAR) ADC Digital Calibration (in Matlab)
  ☆46Updated 6 years ago
• BIGWJZ / VLSI-DSP-Review
  ☆54Updated 4 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆39Updated 8 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆23Updated 3 years ago