Alternatives and similar repositories for Two-way-voice-receiver

Users that are interested in Two-way-voice-receiver are comparing it to the libraries listed below

• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆39Updated last year
• Xinyang-ZHANG / MNIST
  MNIST using tensorflow, c++ and fpga (zynq7010)
  ☆25Updated 2 years ago
• doveyour / mnist-nnet-hls-zynq7020-fpga
  to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…
  ☆80Updated 4 years ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆152Updated last year
• aq12138 / Git_Bilbili
  verilog
  ☆21Updated 2 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆142Updated 5 years ago
• tastynoob / FPGA_network
  ☆37Updated 4 years ago
• Starrynightzyq / ZYNQ-PYNQ-Z2-Gobang
  2018第二届全国大学生FPGA创新设计邀请赛的作品
  ☆60Updated 6 years ago
• xiesicong / fpga_sobel_ov5640_hdmi
  fpga跑sobel识别算法
  ☆38Updated 4 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆202Updated last year
• BigPig-Bro / udp_gmii_ov5640
  本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。
  ☆48Updated last year
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆66Updated 11 months ago
• raiker / tarsier
  ☆33Updated 2 years ago
• devindang / openip-hdl
  Open IP in Hardware Description Language.
  ☆24Updated last year
• wangyuxiao2000 / ccsds-ldpc
  ccsds ldpc encdoer and decoder.(CCSDS 131.1-O-2)
  ☆22Updated 10 months ago
• GJigar / ZYNQ_CNN
  ☆19Updated 2 years ago
• flyjancy / CortexM0_SoC_Task
  Step by step tutorial for building CortexM0 SoC
  ☆38Updated 3 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆51Updated 7 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆222Updated last year
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆58Updated 8 years ago
• lusiyuan-github / ARM_Cortex-M0
  【2022集创赛】Arm杯一等奖作品：Cortex-M0智能娱乐收音机 开源项目
  ☆28Updated 2 years ago
• ChunxuGuo / SummerSchool2022
  ☆62Updated 2 years ago
• suisuisi / FPGAandImage
  image processing based FPGA
  ☆110Updated 3 years ago
• CY0807 / BRAM_DDR3_HDMI
  在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
  ☆27Updated 2 years ago
• luyixdu / ZYNQ_ov5640_hdmi_frame_difference
  帧差法运动目标检测，基于ZYNQ7020
  ☆70Updated 4 years ago
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆24Updated 4 years ago
• iharbour-heyaonan / FPGA_image_process
  FPGA实现简单的图像处理算法
  ☆48Updated 2 years ago
• AugustinJose1221 / FPGA-Build
  A novel architectural design for stitching video streams in real-time on an FPGA.
  ☆125Updated 3 years ago
• maxs-well / LMS-sound-filtering-by-Verilog
  LMS sound filtering by Verilog
  ☆40Updated 5 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆93Updated 7 years ago