2019年全国大学生电子设计大赛G题双路语音调频接收机的FPGA全实现
☆17Apr 15, 2020Updated 6 years ago
Alternatives and similar repositories for Two-way-voice-receiver
Users that are interested in Two-way-voice-receiver are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Pipelined FFT/IFFT 256 points processor☆10Jul 17, 2014Updated 12 years ago
- LLMA = LLM + Arithmetic coder, which use LLM to do insane text data compression. LLMA=大模型+算术编码，它能使用LLM对文本数据进行暴力的压缩，达到极高的压缩率。☆23Nov 24, 2024Updated last year
- 2024年电赛C题 无线传输信号模拟系统 江苏省第一名方案☆34Mar 7, 2025Updated last year
- AI applications on EK-RA8D1 evaluation kit, https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-r…☆17May 4, 2024Updated 2 years ago
- A project demonstrate how to config ad9361 to TX mode☆13Dec 9, 2018Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 七路图像在FPGA中实现拼接，代码会不断添加进来。☆29Aug 17, 2021Updated 4 years ago
- verilog module add prefix script 可用于ysyx项目添加学号☆13Mar 4, 2024Updated 2 years ago
- 2025年电赛G题国一工程☆18Oct 24, 2025Updated 9 months ago
- 信号调制方式识别与参数估计装置（D 题）2023年全国大学生电子设计竞赛试题☆17Nov 7, 2025Updated 9 months ago
- ☆12Feb 7, 2023Updated 3 years ago
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- Stereo digital 2-way crossover filters processing I2S audio (16bit or 24bit) streams☆22May 13, 2024Updated 2 years ago
- ☆16Nov 28, 2023Updated 2 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆132Feb 24, 2026Updated 5 months ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- 小赵的数字系统综合设计代码仓库，欢迎参考☆13Nov 12, 2022Updated 3 years ago
- Turbo coder and decoder☆12Oct 11, 2023Updated 2 years ago
- This is a simple Risc-v core for software simulation on FPGA.☆10Apr 9, 2022Updated 4 years ago
- Use ESP32 device positioning☆13Sep 21, 2020Updated 5 years ago
- 使用国产FPGA厂商安路公司的开发板做的一款基于FPGA的智能导盲杖系统。利用百度LBS开放平台做到自主导航，与Arduino互联实现PID算法，摄像头识别红绿灯，超声波自主避障，语音识别，一键拨打紧急联系人等等☆33Nov 28, 2019Updated 6 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- 8b10b Encoder/Decoder☆13Jul 17, 2014Updated 12 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Hogge Phase EMFI Detector☆15Jun 16, 2021Updated 5 years ago
- ☆11Sep 20, 2024Updated last year
- OFDM baseband processing systerm based on IEEE 802.11a☆13Aug 3, 2020Updated 6 years ago
- ☆13Jul 29, 2016Updated 10 years ago
- An online Verilog IDE based on YosysJS.☆25Jan 7, 2016Updated 10 years ago
- ☆13Nov 28, 2022Updated 3 years ago
- 封装了stm32的FFT函数☆29Mar 24, 2023Updated 3 years ago
- Voice Activity Detector based on MFCC features and DNN model☆31Jul 3, 2023Updated 3 years ago
- An implementation of the simplest single cycle processor.☆29Sep 15, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- 2023年全国大学生电子设计竞赛H题-信号分离装置☆28Jul 17, 2025Updated last year
- 在南京理工大学所写的一些报告☆21May 29, 2021Updated 5 years ago
- 存放TI MSPM0G3507 代码 使用CCS开发☆28Sep 8, 2024Updated last year
- ☆20Jul 6, 2023Updated 3 years ago
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆12Jan 8, 2021Updated 5 years ago
- This project is basically ultrasound Beamformer prototype and FPGA is used to control all the modules of the Hardware.☆16Nov 9, 2017Updated 8 years ago
- MATLAB implementation of the DVB-S2 as in ETSI EN 302 307-1☆15Aug 26, 2021Updated 4 years ago