Alternatives and similar repositories for Face-Detection-on-FPGA

Users that are interested in Face-Detection-on-FPGA are comparing it to the libraries listed below

• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆110Updated 5 years ago
• westonb / OV7670-Verilog
  Verilog modules required to get the OV7670 camera working
  ☆73Updated 6 years ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆63Updated 2 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 5 years ago
• dirjud / Nitro-Parts-lib-SPI
  Verilog SPI master and slave
  ☆54Updated 9 years ago
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆55Updated 5 years ago
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆70Updated 3 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆106Updated last year
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆87Updated 2 years ago
• AngeloJacobo / FPGA_OV7670_Camera_Interface
  Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps
  ☆62Updated 3 years ago
• AhmedAalaaa / 32-point-FFT-Verilog-design-based-DIT-butterfly-algorithm
  This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…
  ☆54Updated last year
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆64Updated 5 years ago
• freecores / verilog_cordic_core
  configurable cordic core in verilog
  ☆51Updated 10 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆149Updated 3 months ago
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆61Updated 3 years ago
• adibis / DDR2_Controller
  DDR2 memory controller written in Verilog
  ☆78Updated 13 years ago
• ivanvig / 2dconv-FPGA
  A 2D convolution hardware implementation written in Verilog
  ☆47Updated 4 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆82Updated 2 years ago
• hdl-util / mipi-csi-2
  Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
  ☆68Updated 4 years ago
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆42Updated last year
• mongrelgem / Verilog-Adders
  Implementing Different Adder Structures in Verilog
  ☆70Updated 5 years ago
• cebarnes / cordic
  An implementation of the CORDIC algorithm in Verilog.
  ☆96Updated 6 years ago
• ZipCPU / cordic
  A series of CORDIC related projects
  ☆107Updated 6 months ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆88Updated 3 years ago
• bmartini / verilog-arbiter
  A look ahead, round-robing parametrized arbiter written in Verilog.
  ☆42Updated 5 years ago
• ultraembedded / fpga_test_soc
  A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)
  ☆33Updated 5 years ago
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆76Updated 2 years ago
• bangonkali / sram
  Simple sram controller in verilog.
  ☆33Updated 9 years ago
• janschiefer / verilog_spi
  A simple Verilog SPI master / slave implementation featuring all 4 modes.
  ☆55Updated 4 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆94Updated 5 years ago