mnemocron / my-discrete-fpgaLinks
My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.
☆47Updated last year
Alternatives and similar repositories for my-discrete-fpga
Users that are interested in my-discrete-fpga are comparing it to the libraries listed below
Sorting:
- FPGA Odysseus with ULX3S☆69Updated 2 years ago
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆87Updated 6 years ago
- A bit-serial CPU written in VHDL, with a simulator written in C.☆133Updated last year
- Playground for VGA projects on Tiny Tapeout☆68Updated last week
- An attempt to recreate the RP2040 PIO in an FPGA☆306Updated last year
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆144Updated 8 months ago
- Minimax: a Compressed-First, Microcoded RISC-V CPU☆222Updated last year
- PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers☆64Updated 7 months ago
- Another size-optimized RISC-V CPU for your consideration.☆58Updated 2 weeks ago
- Doom classic port to lightweight RISC‑V☆101Updated 3 years ago
- Design digital circuits in C. Simulate really fast with a regular compiler.☆177Updated last month
- Example projects/code for the OrangeCrab☆107Updated last year
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆103Updated 2 years ago
- An implementation of a CPU that uses a Linear Feedback Shift Register as a Program Counter instead of a normal one☆53Updated 6 months ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated 3 months ago
- Example LED blinking project for your FPGA dev board of choice☆189Updated this week
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆109Updated this week
- List of all links you can try with ULX3S☆106Updated 4 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 5 months ago
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- Miscellaneous ULX3S examples (advanced)☆81Updated 5 months ago
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆90Updated last year
- Graded exercises for nMigen (WIP)☆55Updated 4 years ago
- Exploring gate level simulation☆59Updated 7 months ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆73Updated this week
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆35Updated last week
- riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way☆71Updated 9 months ago
- WIP 100BASE-TX PHY☆77Updated last year
- CoreScore☆170Updated last month
- sump3 logic analyzer☆31Updated last week