Xilinx / RFNoC-HLS-WINLAB
☆16Updated 3 years ago
Alternatives and similar repositories for RFNoC-HLS-WINLAB:
Users that are interested in RFNoC-HLS-WINLAB are comparing it to the libraries listed below
- ☆27Updated 7 years ago
- A collection of RFSoC introductory notebooks for PYNQ.☆19Updated 3 years ago
- MATLAB toolbox for ADI transceiver products☆59Updated 2 months ago
- OFDM implemented in MATLAB for USRP radios with MAC Layer☆43Updated 10 years ago
- This is a MATLAB SDR implementation of a LoRa receiver: demodulation and decoding☆26Updated 7 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆26Updated 4 months ago
- ☆27Updated last year
- RFSoC2x2 board repo for PYNQ☆17Updated 2 years ago
- MATLAB toolbox for ADI high speed converter products☆19Updated this week
- RFSoC QSFP Data Offload Design with GNU Radio☆17Updated 3 months ago
- Example applications for UHD/RFNoC☆12Updated 2 years ago
- An RFSoC Frequency Planner developed using Python.☆21Updated last year
- 64QAM Wireless communication on ADALM-PLUTO (a SDR active learning module), written in MATLAB, based on some APIs and existing functions.☆16Updated last year
- pynq framework for antsdr☆34Updated 8 months ago
- DMA source and sink blocks for Xilinx Zynq FPGAs☆22Updated 4 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆45Updated last year
- DVB-S2 SDR Transceiver powerded by AFF3CT & StreamPU.☆28Updated this week
- RFNoC out-of-tree module for a channelizer☆15Updated 6 years ago
- Digital Pre-Distortion implementation in GNU Radio☆40Updated 3 years ago
- ☆18Updated 3 years ago
- IEEE 802.16 OFDM-based transceiver system☆22Updated 5 years ago
- DVB-S2 LDPC Decoder☆27Updated 10 years ago
- Playing with Low-density parity-check codes☆91Updated last year
- Open Component Portability Infrastructure☆59Updated 3 years ago
- This repository includes the source codes for the mmWave SDR developed at the University of South Carolina for the AERPAW at NCSU for wir…☆46Updated 5 months ago
- FPGA code and Python API for adding chirp functionality to USRP N210 with CBX daughter board, after the required hardware modification.☆31Updated last year
- Python productivity for RFSoC platforms☆63Updated 9 months ago
- Demonstration of Automatic Gain Control with PYNQ☆12Updated 2 years ago
- 802.11a PHY Layer Implementation for USRP☆43Updated 2 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆59Updated last year