gatelabdavis / RANELinks
☆23Updated 2 years ago
Alternatives and similar repositories for RANE
Users that are interested in RANE are comparing it to the libraries listed below
Sorting:
- Program synthesis tools and utilities for LLVM.☆20Updated last year
- Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)☆17Updated last year
- SMT Attack☆21Updated 4 years ago
- Project Repo for the Simulator Independent Coverage Research☆19Updated 2 years ago
- A concolic testing engine for RISC-V embedded software with support for SystemC peripherals☆23Updated last year
- ☆16Updated 3 years ago
- Modelsim QEMU Unicorn integration via the FLI☆14Updated 2 years ago
- Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor☆17Updated 11 months ago
- ☆14Updated last month
- Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…☆13Updated 3 months ago
- All the tools you need to reproduce the CellIFT paper experiments☆21Updated 3 months ago
- Synthesis of loop-free programs☆16Updated this week
- Code repository for Coppelia tool☆23Updated 4 years ago
- ☆16Updated 2 years ago
- A Modular Open-Source Hardware Fuzzing Framework☆33Updated 3 years ago
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 6 years ago
- Side-channel analysis setup for OpenTitan☆33Updated last week
- Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores☆16Updated this week
- Single Layer Maze Router☆8Updated 3 years ago
- SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs (ICCAD 2023)☆19Updated 6 months ago
- ☆17Updated last year
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆22Updated 8 months ago
- This repository provides supplementary material for our paper HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifi…☆20Updated last year
- ☆15Updated 4 years ago
- Proof-of-concept C implementation of AES with masking technique to prevent side-channel analysis attacks☆37Updated 4 years ago
- This is an implemention of Lee-Moore's Shortest Path Maze Router with multi-sink nets support.☆13Updated 9 years ago
- work in progress, playing around with btor2 in rust☆11Updated 2 weeks ago
- A DMA Controller for RISCV CPUs☆14Updated 9 years ago
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆27Updated last week
- Fuzzing for SpinalHDL☆16Updated 2 years ago