melver / mc2libLinks
Memory consistency model checking and test generation library.
☆15Updated 8 years ago
Alternatives and similar repositories for mc2lib
Users that are interested in mc2lib are comparing it to the libraries listed below
Sorting:
- RTLCheck☆22Updated 6 years ago
- Artifact, reproducibility, and testing utilites for gem5☆22Updated 3 years ago
- ☆9Updated 9 years ago
- ☆14Updated 3 years ago
- ☆19Updated 5 years ago
- Multiple approaches to statistical simulation for computer architects☆15Updated 5 years ago
- ☆32Updated 5 years ago
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆21Updated 11 months ago
- ☆17Updated 4 years ago
- ☆12Updated 11 months ago
- A survey on architectural simulators focused on CPU caches.☆16Updated 5 years ago
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆25Updated 8 months ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆12Updated 5 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆41Updated 2 years ago
- Designing directory cache coherence protocols is complicated because coherence transactions are not atomic in modern multicore processors…☆16Updated 3 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- A parallel and distributed simulator for thousand-core chips☆24Updated 7 years ago
- CleanupSpec (MICRO-2019)☆17Updated 4 years ago
- Methodology that leverages FPV to automatically discover covert channels in hardware that is time-shared between processes. AutoCC operat…☆17Updated 7 months ago
- The RTL source for AnyCore RISC-V☆32Updated 3 years ago
- ☆20Updated this week
- Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…☆12Updated 2 months ago
- The OpenPiton Platform☆28Updated 2 years ago
- ILA Model Database☆22Updated 4 years ago
- ☆12Updated 9 years ago
- Memory System Microbenchmarks☆62Updated 2 years ago
- We solve the two challenges architects face when designing heterogeneous processors with cache coherent shared memory. First, we develop …☆18Updated 3 years ago