☆20Nov 18, 2024Updated last year
Alternatives and similar repositories for UIUC-IMC-Benchmarking
Users that are interested in UIUC-IMC-Benchmarking are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆81Oct 10, 2022Updated 3 years ago
- ☆15Jul 7, 2020Updated 5 years ago
- ☆24Apr 20, 2024Updated 2 years ago
- An example Hardware Processing Engine☆12Feb 4, 2023Updated 3 years ago
- Lock circuitgraphs using various logic locking techniques☆11May 2, 2023Updated 3 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- A basic implementation of a SAT attack on logic locking.☆13Jun 30, 2021Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆96Feb 18, 2022Updated 4 years ago
- PyTorch Quantization Framework For OCP MX Datatypes.☆16May 30, 2025Updated last year
- ☆16Aug 15, 2021Updated 4 years ago
- ☆11Nov 28, 2022Updated 3 years ago
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆21May 27, 2026Updated 3 weeks ago
- This repository contains a detailed description of how to generate parameterized cells using GDSFactory-based layout automation tool GLay…☆13Oct 14, 2024Updated last year
- Code for "Understanding Metastability in SAR ADCs: Part II: Asynchronous"☆12Apr 19, 2022Updated 4 years ago
- ☆25Apr 13, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Optimal gate sizing of digital circuits using geometric programming☆11Aug 18, 2016Updated 9 years ago
- Learning Bayesian Network parameters using Expectation-Maximisation