cmu-l3 / alphaverusView external linksLinks
AlphaVerus: Formally Verified Code Generation through Self-Improving Translation and Treefinement
☆24May 14, 2025Updated 9 months ago
Alternatives and similar repositories for alphaverus
Users that are interested in alphaverus are comparing it to the libraries listed below
Sorting:
- ☆23Oct 1, 2025Updated 4 months ago
- ☆75Jan 22, 2026Updated 3 weeks ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Connecting bv_decide to SMTLIB.☆13Jan 5, 2026Updated last month
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆25Jan 7, 2026Updated last month
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- A Machine-to-Machine Interaction System for Lean 4.☆132Jan 15, 2026Updated 3 weeks ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆22May 24, 2025Updated 8 months ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- [ICLR'25 Spotlight] Rethinking and improving autoformalization: towards a faithful metric and a Dependency Retrieval-based approach☆27May 20, 2025Updated 8 months ago
- ☆16Jul 3, 2023Updated 2 years ago
- Refreshing automation for inductive equational proofs using e-graphs☆24Jul 7, 2024Updated last year
- An inequality benchmark for theorem proving☆21Feb 1, 2026Updated last week
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- ☆19Dec 21, 2020Updated 5 years ago
- Language models for Coq based on data collected from the coq lsp.☆28Jul 24, 2025Updated 6 months ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆22Apr 9, 2025Updated 10 months ago
- Integer Multiplier Generator for Verilog☆23Jul 4, 2025Updated 7 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆26Dec 23, 2025Updated last month
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆33Apr 13, 2025Updated 10 months ago
- A Julia package for consensus-based optimisation☆16Nov 28, 2025Updated 2 months ago
- ☆26Jan 9, 2026Updated last month
- ☆38Jan 22, 2026Updated 3 weeks ago
- ☆38Mar 12, 2024Updated last year
- ☆45Jan 23, 2026Updated 3 weeks ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆41Jul 17, 2024Updated last year
- (Mirror) A Machine-to-Machine Interaction System for Lean 4☆52Updated this week
- Converting Boolean expressions to CMOS Circuits☆11Oct 6, 2020Updated 5 years ago
- 🎮 Real-time game subtitle translator with AI-powered OCR. Context-aware translation for 20+ languages. Free offline models + dirt cheap …☆25Nov 25, 2025Updated 2 months ago
- A tool for checking the contract satisfaction for hardware designs☆12Nov 4, 2025Updated 3 months ago
- MO-LightGBM is a gradient boosting framework based on decision tree algorithms, used for Multi-objective learning to rank tasks.☆18Apr 23, 2025Updated 9 months ago
- A recreation of the Amadeus in steins;gate 0, more specifically the desktop version of Amadeus in Viktor chondria univiersity, I tried to…☆22Jul 28, 2025Updated 6 months ago
- ☆13May 24, 2025Updated 8 months ago
- An Accelerator for Convolution layer designed with Vivado HLS.☆10Dec 4, 2020Updated 5 years ago
- Automated Quantitative Trait Locus Analysis (AutoQTL)☆10Mar 5, 2024Updated last year
- Latex template for VNU-UET Student thesis in Vietnamese.☆13Mar 18, 2023Updated 2 years ago
- Profitable MT5 Expert Advisors☆19Jan 5, 2026Updated last month
- Sources of the EuroProofNet web site.☆13Feb 2, 2026Updated last week