🚀 Real-Time High-Level Synthesis (HLS) Projects for UltraScale+ FPGAs. Accelerated design pipelines, dataflow architectures, and low-latency compute cores — powered by Vitis HLS, AXI4-Stream, and signal processing for 5G, SDR, and HFT applications. 🔧🔬💡
☆15Aug 25, 2025Updated 10 months ago
Alternatives and similar repositories for HLS_FPGA
Users that are interested in HLS_FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Advanced multi-band GNSS SDR front-end implementation in an RFSoC integrated circuit. GPL-3.0 license☆28Sep 3, 2024Updated last year
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆33Jul 21, 2025Updated last year
- For mosbius.org website☆33Jul 31, 2025Updated 11 months ago
- An automated market maker running on top of CoW Protocol☆17Mar 16, 2026Updated 4 months ago
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Nov 27, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- photonSDI - an open source SDI core☆11May 26, 2021Updated 5 years ago
- Learning Path: RISC-V & Advanced Edge AI on SiFive FE310-G002 SoC | 32-bit RISC-V | 320 MHz | 16KB L1 Instruction Cache | 128Mbit (16MB) …☆12Sep 18, 2025Updated 10 months ago
- My attempt to build GPS (GNSS) receiver with a little help of gnuradio☆12Jan 6, 2024Updated 2 years ago
- SystemVerilog RTL Linter for YoSys☆24Nov 22, 2024Updated last year
- On-going project: I will be implementing a combination of pairs trading strategies in attempt to see which type performs best after backt…☆13Jul 20, 2024Updated 2 years ago
- imu解析粗对准-基于速度误差的精对准☆10Jun 16, 2024Updated 2 years ago
- ☆14Sep 29, 2024Updated last year
- Scripts for aligning cryo-electron microscopy direct electron detector movies on whole movies or individual particle trajectories☆12Mar 28, 2017Updated 9 years ago
- ☆12Jul 27, 2023Updated 2 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- This repository contains the implementation of AXI4-Lite interface protocol on system verilog for FPGA/ASIC communication. Modular codeba…☆24May 4, 2024Updated 2 years ago
- mirror of https://gitea.osmocom.org/electronics/atmel-asf-projects☆12Mar 8, 2020Updated 6 years ago
- RISC-V RV32I CPU core☆36Mar 3, 2023Updated 3 years ago
- KF_GINS的GUI程序☆12Aug 4, 2023Updated 2 years ago
- ☆10Jun 26, 2025Updated last year
- RISC-V Dual-Issue RV32I Core in SystemVerilog☆19Jun 26, 2026Updated 3 weeks ago
- Ref design combining the Zynq UltraScale+ MPSoC with the Hailo AI accelerator☆36Jul 7, 2026Updated last week
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆20Aug 19, 2024Updated last year
- Advanced Physical Design Using OpenLANE/SKY130 course notes by Ojasvi Shah☆17Oct 19, 2024Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- pretty print c struct's content at runtime.☆17Sep 27, 2019Updated 6 years ago
- ☆12Mar 17, 2022Updated 4 years ago
- An attempt to synthesize GPS signals in FPGA logic.☆19Feb 17, 2026Updated 5 months ago
- free5GC official site☆16Updated this week
- A bipedal humanoid control system using a Physics-Informed Neural Network (PINN) and Reinforcement Learning (RL) for stability and manipu…☆13Mar 25, 2026Updated 3 months ago
- Repository containing matlab scripts and data used for system identification on a Parrot Bebop 2 drone.☆12Mar 27, 2020Updated 6 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆20Oct 18, 2023Updated 2 years ago
- high-performance-thread-pool☆15Oct 8, 2018Updated 7 years ago
- SLOSH-ML is a Matlab graphical user interface designed to analyze rocket propellant sloshing in space launch vehicles☆19Mar 19, 2026Updated 4 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆12Jul 30, 2021Updated 4 years ago
- ☆19May 14, 2021Updated 5 years ago
- A dual core RISC-V processor (using PULP platform SoC) implemented on a Digilent Arty S7-50 FPGA board.☆15Aug 7, 2022Updated 3 years ago
- FPGA digital camera controller and frame capture device in VHDL☆15Feb 11, 2013Updated 13 years ago
- A version of RTKLIB optimized for single and dual frequency low cost GPS receivers, especially u-blox receivers. It is based on RTKLIB 2…☆15Feb 9, 2021Updated 5 years ago
- A sample code to grab frames from a video using OpenCV, and then to create a video by encoding these frames in H.264 using FFmpeg☆13Jul 22, 2015Updated 10 years ago
- An IDA Pro plugin that sets up the addresses and structures for Cortex M series MCUs (currently stm32f2xx only)☆15Dec 7, 2018Updated 7 years ago