RISC-V Dual-Issue RV32I Core in SystemVerilog
☆29Sep 15, 2026Updated last month
Alternatives and similar repositories for Anvil-Pro
Users that are interested in Anvil-Pro are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository contains my work from the VLSI System Design (VSD) Workshop on 7nm FinFET Circuit Design and Characterization using the A…☆16Sep 9, 2025Updated last year
- Unified RISC-V Prefetch Queue and Branch Predictor☆11Sep 21, 2026Updated last month
- Single Instruction Multiple Threads GPU Core with textbook Streaming Multi-Processor features☆75Jan 30, 2026Updated 9 months ago
- ☆19May 21, 2026Updated 5 months ago
- 3-wide superscalar, out-of-order RISC-V processor (RV32IM subset) in System Verilog, demonstrating key Instruction-Level Parallelism☆32Aug 15, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Z-Core - A Lightweight RISC-V Processor (RV32IMZicsr)☆15Oct 30, 2026Updated 2 weeks ago
- ☆11Jul 9, 2025Updated last year
- A tiny deep neural network framework developed from scratch in C++ and CUDA.☆13Feb 18, 2021Updated 5 years ago
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Nov 27, 2024Updated last year
- Public RTL Question Bank of MakerCode https://makercode.jixiao-ai.com/☆110Oct 9, 2026Updated last month
- Trying to fine tune the configurations of the convolutional layers of a deep learning architecture☆10Nov 11, 2020Updated 6 years ago
- TCL Script automating the frontend of ASIC design☆11Jun 21, 2023Updated 3 years ago
- In this VLSI design course, we explored topics such as HLS programming, combination circuits, sequential circuits, and a capstone project…☆13Jul 23, 2024Updated 2 years ago
- ☆14Nov 7, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Learning Path: RISC-V & Advanced Edge AI on SiFive FE310-G002 SoC | 32-bit RISC-V | 320 MHz | 16KB L1 Instruction Cache | 128Mbit (16MB) …☆12Sep 18, 2025Updated last year
- A small Neural Network Processor for Edge devices.☆20Nov 22, 2022Updated 3 years ago
- linux kernel for pi☆15Nov 1, 2026Updated last week
- 🚀 Real-Time High-Level Synthesis (HLS) Projects for UltraScale+ FPGAs. Accelerated design pipelines, dataflow architectures, and low-lat…☆16Aug 2, 2026Updated 3 months ago
- FPGA, CuDNN/CUDA & C++ Hybrid infrastructure for ultra low-latency algorithmic trading. Implements market data parsing, order book manage…☆26Apr 24, 2026Updated 6 months ago
- A python-based transactional level model for a Eyeriss as a systolic array☆10Dec 19, 2018Updated 7 years ago
- ☆14Sep 29, 2024Updated 2 years ago
- SystemVerilog RTL Linter for YoSys☆24Nov 22, 2024Updated last year
- Forum for AMD OpenGL and Vulkan graphics drivers☆18May 23, 2024Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Linux OpenGL ABI Proposal☆19Oct 10, 2014Updated 12 years ago
- RISCV CPU implementation in SystemVerilog☆33Nov 7, 2026Updated last week
- 👁 Vision : Model 4: GoogLeNet : Image Classification☆20Feb 13, 2018Updated 8 years ago
- Fast lock-free MPMC broadcast square with Dynamic Enter/Exit, Readers-are-also-Writers, Batching, In-place Message Initialization, and mo…☆12Jul 20, 2026Updated 3 months ago
- A virtio layer for xv6☆12Apr 16, 2019Updated 7 years ago
- ☆10Dec 10, 2022Updated 3 years ago
- ☆19Nov 1, 2025Updated last year
- The official repository for Project Vaayu - SIH 1705☆19Dec 20, 2024Updated last year
- # 3.Interview_Questions In my experience, the questions i faced in the interviews and the people surrounded me must have faced a couple o…☆26Jul 9, 2025Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Cat Dog Classifier☆16Dec 23, 2018Updated 7 years ago
- yolov5-acceleration-fpga☆11Jun 25, 2025Updated last year
- Utilize FFMPEG to validate a stream is running for an arbitrary number of HLS streams☆10Aug 21, 2025Updated last year
- The User Guide of XiangShan.☆22Updated this week
- RISC-V Meta – a suite of tools that operate on RISC-V ISA (Instruction Set Architecture)☆12Feb 3, 2019Updated 7 years ago
- A PCIe RTL implementation☆27Aug 16, 2026Updated 2 months ago
- A template for using STM32F1 series devices with the STM32-base project.☆12Mar 8, 2019Updated 7 years ago
Are these results useful?