This is an IDE for YSYX_NPC debuging
☆12Dec 10, 2024Updated last year
Alternatives and similar repositories for NPC_IDE
Users that are interested in NPC_IDE are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆15Jul 28, 2026Updated last month
- Unofficial guide for ysyx students applying to ShanghaiTech University☆25Mar 31, 2026Updated 5 months ago
- A riscv emulator.☆19Feb 5, 2024Updated 2 years ago
- ☆22Aug 3, 2026Updated last month
- ☆30Jun 19, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 本项目已被合并至官方Chiplab中☆14Jan 13, 2025Updated last year
- ☆21May 26, 2025Updated last year
- A Customized ASIC framework for Retro Stuff☆32Updated this week
- ☆12Sep 18, 2024Updated 2 years ago
- ☆73Aug 16, 2026Updated last month
- Basic chisel difftest environment for RTL design (WIP☆21Mar 8, 2025Updated last year
- Mirror of https://gitee.com/loongson-edu/open-la500.git☆29Jan 2, 2025Updated last year
- 无刷电机驱动 程序+电路板 FOC for BLDC motor, code and PCB project☆17Jan 27, 2024Updated 2 years ago
- ☆82Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A eDSL framework based on Scala and MLIR, focusing on the Hardware design.☆80Updated this week
- The Scala parser to parse riscv/riscv-opcodes generate☆26Jan 21, 2026Updated 7 months ago
- RISC-V 64 CPU☆10Oct 4, 2025Updated 11 months ago
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆32Jan 25, 2026Updated 7 months ago
- ☆45Sep 1, 2026Updated 2 weeks ago
- SUSTech CS202 (Computer Organization) Project, with CPU hardware implemented in Chisel(Scala) and software cross-compiled from Rust.☆35Jun 16, 2023Updated 3 years ago
- Nix template for the chisel-based industrial designing flows.☆58Jul 21, 2026Updated last month
- RISC-V instruction encoding/decoding☆12Mar 22, 2023Updated 3 years ago
- ☆40Jul 22, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- nscscc2024，HPU河南理工大学参赛作品，两仪处理器☆13Aug 24, 2024Updated 2 years ago
- 【2024年新版】国科大 陈云霁 智能计算系统AICS实验代码☆13May 31, 2024Updated 2 years ago
- ☆33Apr 10, 2026Updated 5 months ago
- ☆23Oct 6, 2025Updated 11 months ago
- Build mini linux for your own RISC-V emulator!☆25Sep 11, 2024Updated 2 years ago
- A WebDAV Extension for TinyHTTPD☆17Dec 30, 2024Updated last year
- A sample of using VGA mode 13h on a QEMU RISC-V virt machine.☆16Jun 24, 2025Updated last year
- An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …☆22May 12, 2025Updated last year
- gem5 FS模式实验手册☆49Mar 8, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- CPU敏捷开发框架（龙芯杯2024）☆28Sep 6, 2024Updated 2 years ago
- A 32-bit RISC-V SoC on FPGA that supports RT-Thread.☆30Oct 3, 2023Updated 2 years ago
- ☆67Aug 5, 2024Updated 2 years ago
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆35Apr 13, 2025Updated last year
- Generate Linux Perf event tables for Apple Silicon☆19Dec 16, 2025Updated 9 months ago
- 关于移植模型至gemmini的文档☆33May 4, 2022Updated 4 years ago
- 1G‑style Ethernet PHY PCS block in Sky130 using OpenLane☆18Feb 15, 2026Updated 7 months ago