Implementation of tappped delay line TDC on FPGA
☆15Dec 28, 2022Updated 3 years ago
Alternatives and similar repositories for tdcOnFPGA
Users that are interested in tdcOnFPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆13Aug 25, 2022Updated 3 years ago
- A Time to Digital Converter designed for Xilinx 7-Series FPGAs☆37Jan 21, 2021Updated 5 years ago
- Verilog implementation of a tapped delay line TDC☆49Sep 27, 2018Updated 7 years ago
- "PLI-TDC: Super Fine Delay-Time Based Physical-Layer Identification with Time-to-Digital Converter for In-Vehicle Networks" ACM ASIACCS 2…☆14Apr 13, 2026Updated 3 weeks ago
- FPGA based 30ps RMS TDCs☆92Mar 18, 2018Updated 8 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs☆72Feb 1, 2015Updated 11 years ago
- SERDES-based TDC core for Spartan-6☆19Aug 2, 2012Updated 13 years ago
- Time to Digital Converter on an FPGA☆17Oct 8, 2020Updated 5 years ago
- Project: Precise Measure of time delays in FPGA☆32Aug 3, 2017Updated 8 years ago
- A Time to Digital Converter (TDC) on a Xilinx Virtex 5 FPGA.☆24Jul 15, 2017Updated 8 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆74Sep 14, 2021Updated 4 years ago
- This code provides an easy way to simulate TCSPC image data which includes effect of the IRF, background after-pulsing and laser repetiti…☆11Apr 21, 2022Updated 4 years ago
- Time-correlated single photon counting (TCSPC) data analysis☆11Jun 15, 2025Updated 10 months ago
- This is an preliminary processing and analysis for photon-counting lidar data.☆12May 22, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- BrightEyes Time-tagging module: open-source hardware, a time to digital converter, multi channels, with a resolution of 30 ps designed fo…☆18Oct 30, 2023Updated 2 years ago
- FMCW Radar verilog project☆35Jun 15, 2020Updated 5 years ago
- 雷达信号分选任务是对雷达脉冲序列进行K-means聚类,以判定每个脉冲的所属雷达 1、对 2GHz 以内的信号进行多项滤波,以确定信号的中心频带 2、构建分选数据集,对场景中雷达脉冲序列信号进行仿真,并通过UDP传至开发处理 3、基于C++实现K-means算法并部署…☆21Aug 17, 2023Updated 2 years ago
- Arduino library for the Texas Instruments TDC7200 Time-to-Digital Converter for Time-of-Flight Applications in LIDAR, Magnetostrictive an…☆21Mar 10, 2018Updated 8 years ago
- Sigma-Delta Analog to Digital Converter in FPGA (VHDL)☆15Dec 19, 2017Updated 8 years ago
- kintex7 ov13850 fpga mipi camera☆21Dec 2, 2025Updated 5 months ago
- How to design a MIPI CSI interface with Efinix Trion FPGA T20F169 QUICKLY☆10Feb 6, 2020Updated 6 years ago
- 利用ZYNQ7020实现SAR数据采集系统,其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- Multi Layer Perceptron by Vivado HLS for Xilinx FPGA implementation☆12Dec 26, 2016Updated 9 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- MathWorks-Excellence-in-Innovation/projects/Behavioral Modelling of Phase-Locked Loop using Deep Learning Techniques/☆10Feb 4, 2022Updated 4 years ago
- 设计基于STM32与FreeRTOS的四轴飞行器,遥控通过2.4G发送摇杆、按键数据控制飞行器自主飞行,通过姿态解算和串级PID控制实现飞行器自动平衡姿态、定高悬停功能。☆43Jul 25, 2025Updated 9 months ago
- A two ADCs HF/50MHz direct sampling SDR transceiver with OpenHPSDR v2 compatible protocol.☆21Apr 28, 2024Updated 2 years ago
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆47May 20, 2021Updated 4 years ago
- This repository shows design process for wrist watch on HDSP indicators☆12Dec 21, 2024Updated last year
- Digital controller for laser intensity stabilization based on the RedPitaya STEMlab 125-14 board☆24Apr 29, 2026Updated last week
- MATLAB Implementation of a Digital PLL☆17Aug 15, 2016Updated 9 years ago
- Arduino library for the Texas Instruments TDC1000 Ultrasonic Sensing Analog Front End for Level and Concentration Sensing☆14Mar 10, 2018Updated 8 years ago
- Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.☆18Aug 31, 2020Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- 使用YOLOv5识别美式台球(训练数据和模型)☆19Mar 20, 2022Updated 4 years ago
- tDCS using arduino☆20Jul 6, 2017Updated 8 years ago
- 下载 jm 漫画☆14Sep 17, 2025Updated 7 months ago
- A modular open source software for working with scientific devices and combining them into spectrometer.☆38Apr 21, 2026Updated 2 weeks ago
- a derivative of Lar's Arduino GPSDO☆10Nov 1, 2023Updated 2 years ago
- FPGA for uSDR☆21Apr 18, 2026Updated 2 weeks ago
- Open tDCS: tDCS Regulation Circuits - Open Source Hardware☆48Jun 9, 2018Updated 7 years ago