Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
☆58Jun 23, 2021Updated 4 years ago
Alternatives and similar repositories for ZYNQ_ADC_DMA_LWIP
Users that are interested in ZYNQ_ADC_DMA_LWIP are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- EBAZ4205 and AD9226 as a 0-32 MHz radio spectrum viewer☆15Dec 8, 2022Updated 3 years ago
- 利用ZYNQ7020实现SAR数据采集系统,其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- UDP and TCP echo servers using lwIP RAW API running on Xilinx Zynq Platform☆12Apr 15, 2014Updated 11 years ago
- LiteX based FPGA gateware for Thunderscope.☆28Mar 16, 2026Updated last week
- ZYNQ-7000 based data transfer through TCP/IP protocol☆12Apr 20, 2023Updated 2 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- An 8-layer board in Kicad built upon Xilinx Zynq Chip. Includes sound output, HDMI, DDR3, and Arduino Uno style header for screen connect…☆71Nov 6, 2021Updated 4 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆63Oct 20, 2022Updated 3 years ago
- minimal code to access ps DDR from PL☆22Oct 18, 2019Updated 6 years ago
- Transfer data from DDR memory to AXI4-Stream Data FIFO and back through AXI DMA☆23May 20, 2019Updated 6 years ago
- ☆11Apr 3, 2017Updated 8 years ago
- Quick Example how to generate an custom AXI4 IP with AXI4-Full interface (burst) for the Zynq (ZedBoard)☆45Jun 7, 2017Updated 8 years ago
- I2S transciever implemented in Verilog HDL☆32Oct 11, 2017Updated 8 years ago
- LWDO-SDR - experimental LF/VLF SDR timing receiver☆14May 13, 2022Updated 3 years ago
- This project is basically ultrasound Beamformer prototype and FPGA is used to control all the modules of the Hardware.☆15Nov 9, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- 硕士研究生毕业设计总仓☆18Aug 26, 2020Updated 5 years ago
- 包含AD5686R的电路原理图、PCB,以及对AD5684、AD5685、AD5686兼容的驱动程序☆20Aug 17, 2021Updated 4 years ago
- Wishbone SATA Controller☆25Oct 16, 2025Updated 5 months ago
- An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.☆51Nov 23, 2013Updated 12 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆79Apr 11, 2022Updated 3 years ago
- Tutorial for analog input digitalization by the Xilinx Zynq XADC utilizing the DMA and data streaming to a PC over the network.☆34Sep 13, 2025Updated 6 months ago
- DVI to LVDS Verilog converter☆25Sep 3, 2016Updated 9 years ago
- Experimental DRM+/FM decoder☆25Mar 16, 2022Updated 4 years ago
- ☆19Sep 14, 2025Updated 6 months ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- 提供一份稍完整的xduts参考示例,供西电学子入门xduts使用☆37Apr 17, 2024Updated last year
- Open Source iMX6 Rex module design files in Cadence. More at:☆24Aug 2, 2018Updated 7 years ago
- The FreePMU project delivers an open source Phasor Measurement Unit (PMU) for power system analysis based on the STM32F769 Discovery kit …☆12Aug 25, 2022Updated 3 years ago
- WinUSB implementation for the ZYNQ platform (Zybo board)☆27Aug 27, 2018Updated 7 years ago
- Smart Grid State Estimation with PMUs TimeSynchronization Errors☆12Dec 1, 2020Updated 5 years ago
- Project framework for data scalable 7-bit CPU with stack architecture☆11Jan 22, 2023Updated 3 years ago
- Use FPGA to Transfer Image with Gigabits Ethernet☆19Dec 2, 2020Updated 5 years ago
- A Dual-Channel, Low Noise, Modular, 100 kHz Bandwidth, 24-Bit Data Acquisition (DAQ) Device / FFT Signal Analyzer☆15Sep 26, 2022Updated 3 years ago
- Real-time GPU Beamformer for DSA110 written in C/CUDA☆23May 21, 2019Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Allows tweaking of unexposed R820T2 features☆80Dec 10, 2016Updated 9 years ago
- 软件无线电,使用FPGA进行正交解调。☆23Feb 18, 2019Updated 7 years ago
- 基于ZYNQ+AD9363的开源SDR硬 件☆566Sep 13, 2022Updated 3 years ago
- TCL scripts for FPGA (Xilinx)☆35Jul 5, 2022Updated 3 years ago
- ☆33Apr 30, 2023Updated 2 years ago
- Capture data from multiple ADCs concurrently using an FPGA. Stream the captured data out over ethernet + UDP. Tested on the Spartan 6 XC6…☆17Dec 10, 2016Updated 9 years ago
- Eagle design files of a two layer PCB for the ALTERA EP3C5E144 FPGA, including a FTDI USB2.0 controller, 2x 80 MSPS ADC, GPIO, JTAG, conf…☆13Apr 1, 2015Updated 10 years ago