gonzagab / tdcLinks
A Time to Digital Converter (TDC) on a Xilinx Virtex 5 FPGA.
☆21Updated 8 years ago
Alternatives and similar repositories for tdc
Users that are interested in tdc are comparing it to the libraries listed below
Sorting:
- Time to Digital Converter on an FPGA☆14Updated 4 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆65Updated 3 years ago
- A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs☆62Updated 10 years ago
- FPGA based 30ps RMS TDCs☆86Updated 7 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆53Updated 2 years ago
- Fixed Point Kalman filter for fpga☆21Updated 5 years ago
- Verilog implementation of a tapped delay line TDC☆42Updated 6 years ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- FPGA code for reading Hamamatsu C9100 data over cameralink using SPEXI FPGA card.☆22Updated 9 years ago
- AMC module with Xilinx RF-SoC and two analog front-end mezzanines for SDR and quantum applications☆39Updated 2 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆32Updated 4 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆72Updated 3 years ago
- FPGA纯逻辑实现modbus通信☆20Updated 2 years ago
- Repository for the development of an FPGA based DSP Lock-In Amplifier☆67Updated 2 years ago
- ☆20Updated 10 years ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆18Updated 2 years ago
- 使用DDS芯片AD9914产生线性扫频信号☆11Updated 4 years ago
- ☆12Updated 2 years ago
- Project which creates an analogic sine signal from an architecture that involves FPGA. It were used a DDS core to generate the sine and S…☆15Updated 11 years ago
- Zest is a FMC mezzanine board with 8 ADC channels and 2 DACs☆11Updated 9 months ago
- STM32F407 + Spartan6 combo with high speed USB TMC interface☆30Updated 5 years ago
- Adapter board exposing SATA M.2 SSD on FMC board-to-board connector☆14Updated 2 years ago
- A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample dat…☆23Updated 5 years ago
- SEA-S7_gesture recognition☆16Updated 5 years ago
- High-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆10Updated 5 years ago
- Modbus block on FPGA☆13Updated 5 years ago
- Simple mono FM Radio.☆48Updated 9 years ago
- A Time to Digital Converter designed for Xilinx 7-Series FPGAs☆29Updated 4 years ago
- This is BISS-C FPGA IP and It's Driver Repo☆30Updated last year
- ZYNQ-IPMC Hardware☆17Updated 3 years ago