Alternatives and similar repositories for tdc:

Users that are interested in tdc are comparing it to the libraries listed below

• shinde-shantanu / FPGA_TDC
  Time to Digital Converter on an FPGA
  ☆14Updated 4 years ago
• RuiMachado39 / TDC
  Verilog implementation of a tapped delay line TDC
  ☆38Updated 6 years ago
• m-labs / tdc-core
  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
  ☆59Updated 10 years ago
• madamic / zynq_tdc
  A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC
  ☆55Updated 3 years ago
• LGG1997 / FPGA_TDC_1_0
  ☆10Updated 2 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆49Updated 2 years ago
• PranavGovekar / tdcOnFPGA
  Implementation of tappped delay line TDC on FPGA
  ☆13Updated 2 years ago
• jobisoft / jTDC
  FPGA based 30ps RMS TDCs
  ☆82Updated 6 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆29Updated 5 years ago
• QuantumQuadrate / HamamatsuCameralink
  FPGA code for reading Hamamatsu C9100 data over cameralink using SPEXI FPGA card.
  ☆19Updated 9 years ago
• benbr8 / tdc-fpga
  A Time to Digital Converter designed for Xilinx 7-Series FPGAs
  ☆25Updated 4 years ago
• hkhajanchi / fpga-pid
  Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA
  ☆30Updated 4 years ago
• marsohod4you / FpgaTDC
  Project: Precise Measure of time delays in FPGA
  ☆28Updated 7 years ago
• aquaxis / aq_mipi_csi2rx_ultrascaleplus
  ☆28Updated 5 years ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆67Updated 2 years ago
• sbourdeauducq / serdes-tdc
  SERDES-based TDC core for Spartan-6
  ☆18Updated 12 years ago
• samsamfire / Kalman_Fpga
  Fixed Point Kalman filter for fpga
  ☆16Updated 4 years ago
• Hamid-R-Tanhaei / ZYNQ_ADC_DMA_LWIP
  Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
  ☆42Updated 3 years ago
• circuitvalley / USB3_MIPI_CSI2_RX_V2_Crosslink_NX
  MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…
  ☆51Updated last week
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆31Updated 3 years ago
• uwcms / ZYNQ-IPMC-HW
  ZYNQ-IPMC Hardware
  ☆17Updated 2 years ago
• ATaylorCEngFIET / SP701_Imaging_Vivado
  Vivado project for the SP701 Imaging application project
  ☆13Updated 4 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆59Updated 7 years ago
• ahesse93 / RedPitaya_LockInAmplifier
  A lock in amplifier running on the RedPitaya's FPGA
  ☆12Updated 6 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆43Updated last year
• charkster / spi_slave_verilog
  SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
  ☆15Updated 5 years ago
• hellgate202 / csi2_rx
  MIPI CSI-2 RX
  ☆31Updated 3 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆49Updated 5 years ago
• roy77 / Cameralink-LPC-FMC-Module
  ☆18Updated 9 years ago
• VideoGPU / MIPI_CSI2_TX
  VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes
  ☆62Updated last year