m-labs / tdc-coreLinks
A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
☆66Updated 10 years ago
Alternatives and similar repositories for tdc-core
Users that are interested in tdc-core are comparing it to the libraries listed below
Sorting:
- Verilog implementation of a tapped delay line TDC☆46Updated 7 years ago
- FPGA based 30ps RMS TDCs☆91Updated 7 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆69Updated 4 years ago
- Project: Precise Measure of time delays in FPGA☆30Updated 8 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆60Updated 3 years ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆76Updated 2 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆73Updated 3 years ago
- A collection of phase locked loop (PLL) related projects☆115Updated last year
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆56Updated 4 years ago
- SERDES-based TDC core for Spartan-6☆18Updated 13 years ago
- ☆33Updated 6 years ago
- (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…☆89Updated 7 years ago
- USB 2.0 Device IP Core☆73Updated 8 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆132Updated 5 years ago
- FPGA code for reading Hamamatsu C9100 data over cameralink using SPEXI FPGA card.☆22Updated 10 years ago
- Time to Digital Converter on an FPGA☆17Updated 5 years ago
- Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard☆45Updated 4 years ago
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA☆72Updated 5 years ago
- Verilog modules required to get the OV7670 camera working☆76Updated 7 years ago
- Verilog Repository for GIT☆35Updated 4 years ago
- DPLL for phase-locking to 1PPS signal☆34Updated 9 years ago
- A Time to Digital Converter designed for Xilinx 7-Series FPGAs☆35Updated 4 years ago
- SDK for FPGA / Linux Instruments☆107Updated 2 months ago
- SPI Slave for FPGA in Verilog and VHDL☆220Updated last year
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆59Updated 10 months ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆126Updated 4 years ago
- Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL☆74Updated 3 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆53Updated 2 years ago