Alternatives and similar repositories for High-Speed-FPGA-based-Data-Acquisition-System-100MSPS

Users that are interested in High-Speed-FPGA-based-Data-Acquisition-System-100MSPS are comparing it to the libraries listed below

• sbourdeauducq / serdes-tdc
  SERDES-based TDC core for Spartan-6
  ☆18Updated 12 years ago
• shinde-shantanu / FPGA_TDC
  Time to Digital Converter on an FPGA
  ☆14Updated 4 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆21Updated 7 years ago
• hkhajanchi / fpga-pid
  Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA
  ☆32Updated 4 years ago
• patocarr / axi-traffic-gen
  File editor for the Xilinx AXI Traffic Generator IP
  ☆16Updated 6 months ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• Elphel / eddr3
  mirror of https://git.elphel.com/Elphel/eddr3
  ☆40Updated 7 years ago
• FDU-ME-ARC / NVMeCHA
  ☆15Updated 3 years ago
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆34Updated last year
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆34Updated 7 years ago
• charkster / spi_slave_verilog
  SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
  ☆15Updated 5 years ago
• marsohod4you / FpgaTDC
  Project: Precise Measure of time delays in FPGA
  ☆30Updated 7 years ago
• dineshannayya / yifive_r0
  A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program
  ☆20Updated 2 years ago
• xfguo / spi
  SPI Master Core clone from OpenCores
  ☆11Updated 11 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆22Updated 6 years ago
• AbdullahAnsarii / BandPassFilter
  FIR band-pass filter using Verilog HDL.
  ☆12Updated 4 years ago
• ericgineer / CIC
  A CIC filter implemented in Verilog
  ☆22Updated 9 years ago
• mcgodfrey / i2c-eeprom
  Controller for i2c EEPROM chip in Verilog for Mojo FPGA board
  ☆25Updated 9 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆49Updated 2 years ago
• alexforencich / fpga-utils
  Various utilities for working with FPGAs
  ☆13Updated 9 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 9 years ago
• freecores / video_stream_scaler
  Video Stream Scaler
  ☆40Updated 10 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆59Updated 3 years ago
• CoreyChen922 / sata_2_host_controller
  Sata 2 Host Controller for FPGA implementation
  ☆17Updated 7 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 4 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 3 years ago
• antmicro / openssd-nvme
  ☆20Updated 4 years ago
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆54Updated 3 years ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆70Updated 2 years ago