ApotheoTech / Aper-OculusLinks
An open-source Xilinx Kria SOM Carrier for high-speed camera design
☆28Updated last year
Alternatives and similar repositories for Aper-Oculus
Users that are interested in Aper-Oculus are comparing it to the libraries listed below
Sorting:
- Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA☆71Updated 5 years ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆19Updated 2 years ago
- 基于Kintex-7 XC7K325T的高性能FPGA功能验证板☆19Updated 5 years ago
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆58Updated 7 months ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆74Updated 3 years ago
- Time to Digital Converter (TDC)☆35Updated 4 years ago
- PCIe adapter for an FPGA accelerator for Open CloudServer☆24Updated 5 years ago
- kintex7 ov13850 fpga mipi camera☆19Updated last year
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆32Updated 2 years ago
- MIPI CSI-2 + MIPI CCS Demo☆72Updated 4 years ago
- ☆16Updated 3 years ago
- USB serial device (CDC-ACM)☆41Updated 5 years ago
- ☆14Updated 2 years ago
- Delta Sigma DAC FPGA☆44Updated 7 months ago
- Imaging application using MIPI and DisplayPort to process image☆25Updated 5 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆75Updated 2 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆46Updated last year
- Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL☆71Updated 3 years ago
- Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board☆18Updated 3 years ago
- The implementation of AD9371 on KC705☆21Updated 3 months ago
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- Experimental Xilinx Artix-7 driven Data Center Security Communication Module☆55Updated last year
- ☆30Updated 4 years ago
- A CIC filter implemented in Verilog☆22Updated 10 years ago
- MIPI CSI-2 RX☆37Updated 3 years ago
- A current mode buck converter on the SKY130 PDK☆30Updated 4 years ago
- ULPI Link Wrapper (USB Phy Interface)☆29Updated 5 years ago
- experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.☆23Updated last year
- Verilog Repository for GIT☆33Updated 4 years ago