FPGA based 30ps RMS TDCs
☆99Mar 18, 2018Updated 8 years ago
Alternatives and similar repositories for jTDC
Users that are interested in jTDC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs☆75Feb 1, 2015Updated 11 years ago
- Implementation of tappped delay line TDC on FPGA☆16Dec 28, 2022Updated 3 years ago
- ☆12Aug 25, 2022Updated 4 years ago
- A Time to Digital Converter designed for Xilinx 7-Series FPGAs☆41Jan 21, 2021Updated 5 years ago
- Verilog implementation of a tapped delay line TDC☆51Sep 27, 2018Updated 8 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Project: Precise Measure of time delays in FPGA☆33Aug 3, 2017Updated 9 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆82Sep 14, 2021Updated 5 years ago
- A Time to Digital Converter (TDC) on a Xilinx Virtex 5 FPGA.☆25Jul 15, 2017Updated 9 years ago
- Time to Digital Converter on an FPGA☆11Oct 19, 2019Updated 7 years ago
- Time to Digital Converter on an FPGA☆18Oct 8, 2020Updated 6 years ago
- SERDES-based TDC core for Spartan-6☆19Aug 2, 2012Updated 14 years ago
- Arduino library for the Texas Instruments TDC7200 Time-to-Digital Converter for Time-of-Flight Applications in LIDAR, Magnetostrictive an…☆20Mar 10, 2018Updated 8 years ago
- High-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆10Jul 12, 2020Updated 6 years ago
- "PLI-TDC: Super Fine Delay-Time Based Physical-Layer Identification with Time-to-Digital Converter for In-Vehicle Networks" ACM ASIACCS 2…☆15Oct 23, 2026Updated last week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- BrightEyes Time-tagging module: open-source hardware, a time to digital converter, multi channels, with a resolution of 30 ps designed fo…☆20Oct 30, 2023Updated 3 years ago
- servo motor control with FPGA☆10Nov 14, 2015Updated 10 years ago
- This code provides an easy way to simulate TCSPC image data which includes effect of the IRF, background after-pulsing and laser repetiti…☆11Apr 21, 2022Updated 4 years ago
- Time to Digital Converter (TDC)☆38Dec 27, 2020Updated 5 years ago
- Open Source HVS for geiger counters.☆12Jan 20, 2026Updated 9 months ago
- An Arduino library for interfacing with an ACAM TDC-GP22 over SPI (For Arduino Due)☆17Jun 15, 2020Updated 6 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆35Aug 31, 2020Updated 6 years ago
- 从上位机采用UART或以太网将位流文件烧写到片外Flash中,利用Xilinx FPGA的Multiboot特性,进行OTA(over the air)在线升级。如升级失败,可以回到原来的位流文件。☆13Dec 7, 2023Updated 2 years ago
- How to design a MIPI CSI interface with Efinix Trion FPGA T20F169 QUICKLY☆10Feb 6, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- FPGA1394 V3 PCB Design☆14Feb 24, 2025Updated last year
- 基于Kintex-7 XC7K325T的高性能FPGA功能验证板☆19Feb 13, 2020Updated 6 years ago
- All thing about SDRPi☆20Mar 17, 2023Updated 3 years ago
- High-througput logic analyzer for FPGA☆17Oct 8, 2020Updated 6 years ago
- Python interface to PCIE☆41Apr 30, 2018Updated 8 years ago
- Time-correlated single photon counting (TCSPC) data analysis☆12Sep 23, 2026Updated last month
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆50May 20, 2021Updated 5 years ago
- FMCW Radar verilog project☆36Jun 15, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Sub-nanosecond time interval counter☆51Dec 15, 2025Updated 10 months ago
- include hdlc (miao), 422 grapher, 1553b☆21Oct 10, 2019Updated 7 years ago
- 利用ZYNQ7020实现SAR数据采集系统,其中包含硬件设计代码、上位机、测试程序。☆16Feb 27, 2025Updated last year
- LiteX based White Rabbit PCIe NIC developped for Warsaw University of Technology.☆27Oct 8, 2026Updated 3 weeks ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆70Mar 15, 2022Updated 4 years ago
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆178Jun 24, 2021Updated 5 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Nov 21, 2017Updated 8 years ago