Hardware Description Language Translator
☆17May 3, 2026Updated this week
Alternatives and similar repositories for vhdl2verilog
Users that are interested in vhdl2verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Hardware Description Language Translator☆19Apr 20, 2026Updated 2 weeks ago
- Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…☆19Aug 13, 2018Updated 7 years ago
- Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV☆12Apr 20, 2026Updated 2 weeks ago
- A collection of tools for working with Chisel-generated hardware in SystemC☆16Jul 23, 2019Updated 6 years ago
- Direct Access Memory for MPSoC☆13Apr 19, 2026Updated 2 weeks ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Apr 19, 2026Updated 2 weeks ago
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 3 years ago
- ☆11Feb 16, 2019Updated 7 years ago
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Apr 19, 2026Updated 2 weeks ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model.☆12Nov 6, 2019Updated 6 years ago
- System on Chip verified with UVM/OSVVM/FV☆35Updated this week
- Multi-Processor System on Chip verified with UVM/OSVVM/FV☆36Updated this week
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Updated this week
- Waveform Generator☆12Jul 18, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- USB2.0 Verilog☆20Apr 21, 2019Updated 7 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 4 years ago
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- Network on Chip for MPSoC☆28Apr 19, 2026Updated 2 weeks ago
- ☆16Jan 12, 2021Updated 5 years ago
- UVM verification kits which uses YASA as simulation script☆18Dec 10, 2019Updated 6 years ago
- acp was a fork of the vim plugin autocomplpop (2.14.1) - I've switched to a new neovim setup and no longer maintain this☆11Feb 5, 2013Updated 13 years ago
- Hardware design with Chisel☆35Feb 9, 2023Updated 3 years ago
- Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)☆11Jun 1, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- [UNRELEASED] FP div/sqrt unit for transprecision☆27Sep 9, 2025Updated 8 months ago
- Using Nim to interface with SystemVerilog test benches via DPI-C☆32May 15, 2025Updated 11 months ago
- Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project☆17Mar 9, 2020Updated 6 years ago
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- Artifacts for the SCVP lecture☆12Nov 17, 2021Updated 4 years ago
- Customized vim and neovim color scheme inspired from lucario with darkblue elements☆11Jun 25, 2018Updated 7 years ago
- Video Effects on VGA☆15Jan 7, 2019Updated 7 years ago
- ☆12Dec 22, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Software to look for interrelationships between constants and find formulas for number sequences☆19Mar 5, 2026Updated 2 months ago
- A Python module to interact with an Intel JTAG UART☆18May 8, 2021Updated 5 years ago
- Contains commonly used UVM components (agents, environments and tests).☆33Aug 17, 2018Updated 7 years ago
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 9 years ago
- ☆11Jun 28, 2020Updated 5 years ago
- ☆13Sep 22, 2022Updated 3 years ago
- Experiments with fixed function renderers and Chisel HDL☆60Mar 31, 2019Updated 7 years ago