☆56Jan 29, 2024Updated 2 years ago
Alternatives and similar repositories for RANC
Users that are interested in RANC are comparing it to the libraries listed below
Sorting:
- PyTorch helper module to translate to and from NIR☆18Mar 6, 2026Updated 2 weeks ago
- Metrics for spiking neural networks based on torchmetrics☆13Mar 27, 2023Updated 2 years ago
- Framework for radix encoded SNN on FPGA☆18Dec 7, 2021Updated 4 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 2 years ago
- Hardware and software implementation of Sparsely-active SNNs☆22Mar 6, 2026Updated 2 weeks ago
- Repository for the 2024 Telluride Topic Area Neuromorphic Systems for Space☆13Jun 21, 2024Updated last year
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆222Apr 20, 2019Updated 6 years ago
- CARLsim is an efficient, easy-to-use, GPU-accelerated software framework for simulating large-scale spiking neural network (SNN) models w…☆17May 17, 2022Updated 3 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆76Mar 30, 2023Updated 2 years ago
- NeMo - A hardware agnostic neuromorphic processor simulation model built on ROSS☆14Aug 11, 2020Updated 5 years ago
- Fully opensource spiking neural network accelerator☆170Feb 13, 2023Updated 3 years ago
- Quantization-aware training with spiking neural networks☆53Feb 18, 2022Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆92Feb 18, 2022Updated 4 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆206Nov 4, 2023Updated 2 years ago
- FeedForward Propagation Through Time on Spiking Neural Network (SNNs)☆59Jan 2, 2023Updated 3 years ago
- A machine learning library for spiking neural networks. Supports training with both torch and jax pipelines, and deployment to neuromorph…☆77Feb 10, 2026Updated last month
- Advanced Machine Learning Fall 2020 Project Repository☆12Dec 12, 2020Updated 5 years ago
- An application to visualize scholar articles as an interactive graph☆20Mar 4, 2023Updated 3 years ago
- Neuromorphic Intermediate Representation reference implementation☆155Updated this week
- FPGA Design of a Spiking Neural Network.☆47May 15, 2024Updated last year
- Sends event camera data from A to B. Supports live cameras and dead recordings☆23Feb 17, 2026Updated last month
- SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor Aided loGIC☆15Jan 23, 2020Updated 6 years ago
- A list of neuromorphic software projects☆287Jul 12, 2025Updated 8 months ago
- A nest brain simulator based on FPGA(LIF NEURON)☆15Dec 14, 2021Updated 4 years ago
- ☆30Jun 8, 2022Updated 3 years ago
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆68Mar 3, 2024Updated 2 years ago
- ☆20Nov 23, 2022Updated 3 years ago
- Neuromorphic ASIC with 96 neurons on Tiny Tapeout 7☆11May 25, 2024Updated last year
- PyTorch implementation of the eligibility propagation (e-prop) learning algorithm.☆58Feb 18, 2022Updated 4 years ago
- ☆16Aug 21, 2020Updated 5 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆15Sep 9, 2023Updated 2 years ago
- SNN on FPGA☆12Apr 26, 2022Updated 3 years ago
- codes of the paper Rate Gradient Approximation Attack Threats Deep Spiking Neural Networks (CVPR 2023)☆16Aug 19, 2024Updated last year
- Efficient streaming of sparse event data supporting files, network I/O, GPU peripherals (via Torch/Jax/Numpy) and neuromorphic protocols☆86Aug 5, 2025Updated 7 months ago
- An FPGA design for simulating biological neurons☆17Jul 5, 2024Updated last year
- Python/Simulator integration using procedure calls☆10Mar 12, 2020Updated 6 years ago
- A Loihi emulator based on Brian2☆29Dec 6, 2021Updated 4 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆77Dec 30, 2019Updated 6 years ago
- Benchmark harness and baseline results for the NeuroBench algorithm track.☆108Jan 3, 2026Updated 2 months ago