coreylammie / TCAS-STDPLinks
IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures
☆27Updated 6 years ago
Alternatives and similar repositories for TCAS-STDP
Users that are interested in TCAS-STDP are comparing it to the libraries listed below
Sorting:
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- Spiking Neural Network RTL Implementation☆62Updated 4 years ago
- ☆20Updated 4 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆71Updated 2 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆62Updated 4 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆201Updated 6 years ago
- SNN on FPGA☆12Updated 3 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Updated 5 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 7 months ago
- A repository FPGA-friendly SNN models☆34Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆89Updated 3 years ago
- Framework for radix encoded SNN on FPGA☆16Updated 3 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- ☆17Updated 4 years ago
- ☆19Updated 2 years ago
- Spiking neural network for Zynq devices with Vivado HLS☆35Updated 7 years ago
- ☆28Updated 3 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆14Updated 2 years ago
- ☆50Updated last year
- ☆94Updated 5 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆25Updated 7 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆19Updated 5 years ago
- FPGA based Leaky Integrate and Fire (LIF) neuron model accelerator for PyTorch☆84Updated 3 months ago
- FPGA Design of a Spiking Neural Network.☆43Updated last year
- A nest brain simulator based on FPGA(LIF NEURON)☆14Updated 3 years ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆21Updated last year
- Fully opensource spiking neural network accelerator☆158Updated 2 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago