☆16Aug 6, 2022Updated 4 years ago
Alternatives and similar repositories for AMD_AECG_Summer_School_Projects
Users that are interested in AMD_AECG_Summer_School_Projects are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Vitis AI Lab: MNIST classifier☆19Aug 11, 2022Updated 4 years ago
- ☆62Sep 22, 2022Updated 3 years ago
- ☆18Sep 25, 2025Updated 11 months ago
- ☆24Dec 3, 2021Updated 4 years ago
- ☆22Oct 26, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- Code of the paper "Degradation Estimation Recurrent Neural Network with Local and Non-Local Priors for Compressive Spectral Imaging"☆26Jan 6, 2024Updated 2 years ago
- Autonomous Driving Research and Educational Platform☆15Dec 22, 2021Updated 4 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆14Nov 28, 2019Updated 6 years ago
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆89Jun 29, 2023Updated 3 years ago
- ☆12Jul 20, 2022Updated 4 years ago
- Canny Edge detector algorith optimized on the Programmable Logic (HW) of the Zynq-7000 FPGA Architecture☆13Jun 3, 2020Updated 6 years ago
- Verilog program☆16Jul 27, 2020Updated 6 years ago
- A Simple and Efficient Reconstruction Backbone for Snapshot Compressive Imaging☆25Apr 18, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28May 11, 2022Updated 4 years ago
- The Demo that was presented at FCCM.☆16Aug 16, 2018Updated 8 years ago
- A repository of my Xilinx Open Hardware 2020 submission including a demo of support vector machines on PYNQ, C++ source code and projects…☆16Jun 27, 2020Updated 6 years ago
- Personal portfolio☆13Sep 1, 2026Updated last week
- ☆27Nov 4, 2022Updated 3 years ago
- ☆27Jun 28, 2021Updated 5 years ago
- reconstruction algorithms for snapshot compressive imaging☆27Jul 23, 2023Updated 3 years ago
- PYNQ Composabe Overlays☆80Jun 17, 2024Updated 2 years ago
- view at https://xupsh.github.io/ccc2021/☆23Apr 16, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- AMD University Program HLS tutorial☆132Oct 28, 2024Updated last year
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- The following project can be used to monitor the driver continuously for fatigue and the case of exhaustion and that of falling asleep. I…☆11Jun 8, 2018Updated 8 years ago
- CNN simd based accelerator using Vitis HLS☆12Jul 15, 2022Updated 4 years ago
- [ICCV 2023] Source code and pre-trained models for "Deep Optics for Video Snapshot Compressive Imaging".☆11Jul 16, 2024Updated 2 years ago
- ☆13Aug 22, 2018Updated 8 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 6 years ago
- Open Source Cell Library for Predictive CNFET Technology☆15Mar 12, 2026Updated 5 months ago
- Plug-and-Play Algorithms for Video Snapshot Compressive Imaging (TPAMI 2022)☆43Jan 12, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Jun 29, 2022Updated 4 years ago
- [ECCV 2024] Hierarchical Separable Video Transformer for Snapshot Compressive Imaging☆10Mar 19, 2025Updated last year
- Examples for integrating the AIHelp iOS SDK in your app.☆15Aug 10, 2026Updated last month
- ☆11Sep 3, 2022Updated 4 years ago
- 透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。☆19Oct 25, 2023Updated 2 years ago
- An HBM FPGA based SpMV Accelerator☆19Aug 29, 2024Updated 2 years ago
- This repository contains source code for CNN layers of ALexNet using Xilinx HLS Vivado.☆10Jun 25, 2022Updated 4 years ago