Alternatives and similar repositories for MIPS-architecture-CPU-design-based-on-FPGA

Users that are interested in MIPS-architecture-CPU-design-based-on-FPGA are comparing it to the libraries listed below

• zhangly / azpr_cpu
  用Altera FPGA芯片自制CPU
  ☆41Updated 11 years ago
• cnrv / clone-helpers
  Helper scripts used to clone RISC-V related git repos inside China.
  ☆15Updated 4 years ago
• wzc810049078 / ZC-RISCV-CORE
  ZC RISCV CORE
  ☆13Updated 5 years ago
• zhaishaomin / ring_network-based-multicore-
  多核处理器 ;ring network , four core, shared space memory ,directory-based cache coherency
  ☆26Updated 9 years ago
• ruanshihai / CPU
  Verilog实现的简单五级流水线CPU，开发平台：Nexys3
  ☆40Updated 10 years ago
• Bamboo1583 / sdram_controller
  使用verilog编写sdram控制器
  ☆12Updated 6 years ago
• xupsh / ZynqBook
  基于Xilinx Zynq 嵌入式软硬件协同设计实战指南
  ☆83Updated 10 years ago
• lingscale / cc01
  ☆31Updated 5 months ago
• rgwan / kamikaze
  Light-weight RISC-V RV32IMC microcontroller core.
  ☆105Updated 8 years ago
• zhouqinghua / zqh_riscv
  zqh_riscv is an open source SOC system based on riscv core and tilelink NOC bus. coding with PHGL language(python DSL language). this pro…
  ☆39Updated 3 years ago
• antmicro / openssd-nvme
  ☆31Updated 4 years ago
• aiminickwong / H264
  H264视频解码verilog实现
  ☆82Updated 8 years ago
• open-dv / dma_axi
  ☆16Updated 6 years ago
• jdocampom / JPEG-Decoder
  Verilog Code for a JPEG Decoder
  ☆34Updated 7 years ago
• C-L-G / My_Opensource_AZPR_SOC
  根据最近看的一本书编写的对应RTL以及Testbench
  ☆19Updated 8 years ago
• Jefferyy-Peng / AXI_DMA_CONTROLLER
  ☆11Updated 2 years ago
• kaito0422 / Nexy4-DDR-ARM-Cortex-M3-system-for-ARM-core-
  给定ARM Cortex-M3的软核，扩展周围的AMBA总线以及基本外设，完成在上面的汇编以及C语言的执行
  ☆18Updated 6 years ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆108Updated 2 years ago
• takeshineshiro / fpga_fibre_scan
  本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互，CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程： 1. 链路初始化： 在上位机完成USB固件的下载，并读取…
  ☆28Updated 9 years ago
• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 7 years ago
• huaweicloud / huaweicloud-fpga
  The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.
  ☆53Updated 6 years ago
• DeamonYang / FPGA_SDR
  软件无线电，使用FPGA进行正交解调。
  ☆22Updated 6 years ago
• ansonn / esl_systemc
  systemc建模相关
  ☆27Updated 11 years ago
• baochuquan / RISCV-MMU
  ☆14Updated 7 years ago
• redchenjs / wujian100_open
  平头哥无剑100开源SoC平台（双核E902，安全启动，BootROM，IOPMP，Mailbox，RSA-2048，SHA-2， WS2812，Flash）
  ☆19Updated 2 years ago
• Elrori / OV_camera_on_FPGA
  OV7670 (Verilog HDL)Drive for FPGA
  ☆17Updated 6 years ago
• rakeshgehalot / Ethernet_switch_verification
  Verification of Ethernet Switch System Verilog
  ☆11Updated 8 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆36Updated 10 years ago
• czy78963 / ZYNQ7020-LinuxDrv-LearningRecord
  基于ALINX-AX7020平台的Linux驱动开发学习。
  ☆47Updated 5 years ago
• shalan / QSPI_XIP_CTRL_DMC
  Quad SPI Flash XIP Controller with a direct mapped cache
  ☆11Updated 4 years ago