A proof-of-concept, Rust-inspired, declarative hardware description language optimized for RTL coding
☆22Mar 3, 2025Updated last year
Alternatives and similar repositories for hdl
Users that are interested in hdl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Verilog Filelist parser in Rust☆11Mar 25, 2022Updated 4 years ago
- 3D Visualization Results of IMU MPU6050 Angle Readings in Matplotlib 3D☆14Feb 3, 2024Updated 2 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆14Mar 2, 2022Updated 4 years ago
- Rust Test Bench - write HDL tests in Rust.☆24Nov 28, 2022Updated 3 years ago
- A distributed filesystem☆10Jan 31, 2017Updated 9 years ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- In love with Atalanta☆15Feb 28, 2025Updated last year
- Let's write RISC-V CPU in Veryl!☆63Feb 12, 2026Updated last month
- Determines the modules declared and instantiated in a SystemVerilog file☆51Sep 23, 2024Updated last year
- SystemVerilog parser library fully compliant with IEEE 1800-2017☆467Nov 4, 2025Updated 4 months ago
- An HDL embedded in Rust.☆203Nov 15, 2023Updated 2 years ago
- An example of a simple bare-metal application for the ARM Cortex A9 processor (Altera Cyclone V HPS)☆11May 14, 2020Updated 5 years ago
- An example application using mongodb rust tide and handlebars A.K.A MoRTH stack☆14Nov 19, 2020Updated 5 years ago
- Learning project to better understand blockchains and how to implement them in Swift. Heavily based on Naivechain: https://github.com/lha…☆11Apr 5, 2017Updated 8 years ago
- Interface for the Alumina Network CNC stack☆18Sep 21, 2025Updated 6 months ago
- NordVPN Special Discount Offer • AdSave on top-rated NordVPN 1 or 2-year plans with secure browsing, privacy protection, and support for for all major platforms.
- Programmatically generated PCB libraries facilitating robust electronic product design.☆17Dec 15, 2025Updated 3 months ago
- Easily create a mirror of crates.io (crate downloads only, not the website)☆13Aug 26, 2018Updated 7 years ago
- An innovative Verilog-A compiler☆182Aug 20, 2024Updated last year
- RTLMeter benchmark suite☆29Mar 15, 2026Updated last week
- A KICAD pcbnew plugin to align two pads on two modules horizontally or vertically☆14Nov 22, 2019Updated 6 years ago
- Veryl: A Modern Hardware Description Language☆907Updated this week
- Deep learning based prediction of pi-helices in protein sequences☆11Mar 24, 2023Updated 3 years ago
- Comparing Different Stochastic Gradien Descent implementations in Haskell against Python☆10Jul 25, 2016Updated 9 years ago
- Implementation of several grid routers in Rust☆13Feb 28, 2026Updated 3 weeks ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- 🦀 No-nonsense hardware testing/simulation in Rust 🛠️ | Verilog, Spade, Veryl☆91Mar 5, 2026Updated 2 weeks ago
- 实验:rust 实现 llama2 推理☆17Feb 23, 2024Updated 2 years ago
- DSP Blocks for the nMigen (Python) Toolbox☆11Nov 5, 2020Updated 5 years ago
- ☆17Apr 14, 2022Updated 3 years ago
- Faust major mode for editing faust code (.dsp files)☆16Oct 4, 2020Updated 5 years ago
- The new Reactome REST API to access the data☆11Mar 13, 2026Updated last week
- Unified interface for type-safe MMIO and CPU register access in Rust☆49Jul 5, 2021Updated 4 years ago
- coffeescript based hardware description language☆14Jan 14, 2022Updated 4 years ago
- Baseline SoC for Precursor☆16Oct 27, 2020Updated 5 years ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A modern simple Zola's theme related to docs as code methodology☆13May 6, 2023Updated 2 years ago
- Useful UVM extensions☆27Jul 10, 2024Updated last year
- SystemVerilog RTL and UVM RAL model generators for RgGen☆17Jan 7, 2026Updated 2 months ago
- Improved version of http://web.mit.edu/6.111/volume2/www/f2018/tools/sd_controller.v☆13Dec 6, 2021Updated 4 years ago
- ☆30Jan 18, 2023Updated 3 years ago
- This is a C library to interface with the LiteX Firmware on Thunderscope over PCIe☆11Feb 22, 2026Updated last month
- Main repo for Go2UVM source code, examples and apps☆21Mar 31, 2023Updated 2 years ago