Read and write VCD (Value Change Dump) files in Rust
☆45Feb 27, 2024Updated 2 years ago
Alternatives and similar repositories for rust-vcd
Users that are interested in rust-vcd are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Python package for writing Value Change Dump (VCD) files.☆134Nov 10, 2024Updated last year
- Small 32-bit RISC-V CPU with a half-width datapath inspired by the 68000☆16Dec 21, 2023Updated 2 years ago
- ☆12Sep 20, 2022Updated 3 years ago
- A simple digital waveform viewer with vi-like key bindings.☆145Mar 7, 2025Updated last year
- Easy SMT solver interaction☆34Feb 3, 2026Updated 3 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆30Jan 18, 2023Updated 3 years ago
- The open-source Zynq 7000 BSP generator for openXC7☆59Jan 21, 2025Updated last year
- A nicer HDL.☆98Apr 8, 2017Updated 9 years ago
- A VCD parser object☆40Jul 17, 2013Updated 12 years ago
- The hardware implementation of UDP in Bluespec SystemVerilog☆14Jun 3, 2024Updated last year
- A hardware compiler based on LLHD and CIRCT☆270Jun 30, 2025Updated 10 months ago
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆126Updated this week
- VCD file (Value Change Dump) command line viewer☆120Nov 9, 2025Updated 6 months ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Handle Fast Signal Traces (fst) in Python☆15Jun 11, 2025Updated 11 months ago
- cpp parser for reading a VCD (value change dump) file☆10Jul 15, 2013Updated 12 years ago
- Linux UIO Library in Rust☆21Apr 14, 2026Updated last month
- Beautiful Digital Timing Diagrams with Rust☆94May 4, 2026Updated 3 weeks ago
- 8x8 monochrome bitmap fonts for rendering. Implemented in Rust.☆17Apr 5, 2021Updated 5 years ago
- Signal analyzer CSV to IEEE 1364-2001 VCD file format converter.☆11Aug 13, 2021Updated 4 years ago
- IPXACT packaging utilities for Chisel 3.x using Xilinx Vivado Design Suite.☆12Dec 5, 2018Updated 7 years ago
- System Design in Python (SyDPy) is a tool for design and verification of concurrent systems. The tool is offered as an alternative to Sys…☆12Jun 2, 2016Updated 9 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆14Jan 28, 2026Updated 3 months ago
- Low Level Hardware Description — A foundation for building hardware design tools.☆434Apr 20, 2022Updated 4 years ago
- Hardware abstraction layer for HackRF software-defined radio☆14Feb 4, 2017Updated 9 years ago
- The Berkeley Verilog-A Parser and Processor☆15Mar 24, 2017Updated 9 years ago
- Prefix tree adder space exploration library☆55Jan 27, 2026Updated 3 months ago
- ☆11May 30, 2018Updated 7 years ago
- WiShield library with user contributed features☆40Jan 5, 2016Updated 10 years ago
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆24Feb 25, 2025Updated last year
- Download a million samples from Rigol DS1052E via usbtmc☆23Jan 6, 2014Updated 12 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆20Mar 3, 2026Updated 2 months ago
- Board support crate for STMicroElectronics STM32H7 Nucleo-144 boards.☆12Aug 23, 2024Updated last year
- Programming an arduino robot in Rust☆10Mar 16, 2021Updated 5 years ago
- sample VCD files☆43Feb 13, 2026Updated 3 months ago
- 21st century electronic design automation tools, written in Rust.☆37May 7, 2026Updated 2 weeks ago
- ☆18Jul 12, 2024Updated last year
- Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server☆1,846Mar 13, 2026Updated 2 months ago