SkyworksSolutionsInc / fplibLinks
Fixed point math library for SystemVerilog
☆35Updated 10 months ago
Alternatives and similar repositories for fplib
Users that are interested in fplib are comparing it to the libraries listed below
Sorting:
- Raptor end-to-end FPGA Compiler and GUI☆84Updated 9 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆106Updated 3 weeks ago
- An automatic clock gating utility☆50Updated 5 months ago
- ASIC implementation flow infrastructure☆115Updated this week
- ☆49Updated 7 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆71Updated 3 weeks ago
- A Rust VCD parser intended to be the backend of a Waveform Viewer(built using egui) that supports dynamically loaded rust plugins.☆48Updated 8 months ago
- Prefix tree adder space exploration library☆57Updated 10 months ago
- Fabric generator and CAD tools graphical frontend☆14Updated last month
- A Python package for generating HDL wrappers and top modules for HDL sources☆36Updated 3 weeks ago
- Plugins for Yosys developed as part of the F4PGA project.☆84Updated last year
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆56Updated 2 weeks ago
- SpinalHDL Hardware Math Library☆90Updated last year
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆59Updated last month
- Xilinx Unisim Library in Verilog☆85Updated 5 years ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- System on Chip toolkit for Amaranth HDL☆92Updated 11 months ago
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆110Updated 4 years ago
- This repository is for (pre-)release versions of the Revolution EDA.☆43Updated last week
- Proposed RISC-V Composable Custom Extensions Specification☆71Updated 2 months ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆65Updated this week
- Fabric generator and CAD tools.☆198Updated this week
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆118Updated 2 years ago
- Small SERV-based SoC primarily for OpenMPW tapeout☆47Updated 3 months ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆44Updated 6 months ago
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.☆45Updated 8 months ago
- Mathematical Functions in Verilog☆95Updated 4 years ago
- RISC-V Nox core☆68Updated 2 months ago
- Bitstream relocation and manipulation tool.☆47Updated 2 years ago
- ☆38Updated 3 years ago