Goshik92 / FFTVisualizer
This project demonstrates DSP capabilities of Terasic DE2-115
☆27Updated 6 years ago
Alternatives and similar repositories for FFTVisualizer:
Users that are interested in FFTVisualizer are comparing it to the libraries listed below
- Delta-sigma ADC,PDM audio FPGA Implementation☆68Updated 2 years ago
- Audio controller (I2S, SPDIF, DAC)☆82Updated 5 years ago
- Small (Q)SPI flash memory programmer in Verilog☆57Updated 2 years ago
- USB 2.0 Device IP Core☆53Updated 7 years ago
- configurable cordic core in verilog☆47Updated 10 years ago
- Extremely basic CortexM0 SoC based on ARM DesignStart Eval☆24Updated 6 years ago
- PID controller☆19Updated 10 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- An i2c master controller implemented in Verilog☆32Updated 7 years ago
- I2C controller core☆35Updated 2 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆30Updated 4 years ago
- A series of CORDIC related projects☆94Updated 2 months ago
- ☆16Updated 6 months ago
- USB1.1 Host Controller + PHY☆11Updated 3 years ago
- USB Full Speed PHY☆39Updated 4 years ago
- A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen☆18Updated 10 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆76Updated 2 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆30Updated 4 years ago
- ULPI Link Wrapper (USB Phy Interface)☆25Updated 4 years ago
- JESD204b modules in VHDL☆29Updated 5 years ago
- VHDL Modules☆23Updated 9 years ago
- Verilog modules required to get the OV7670 camera working☆65Updated 6 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆61Updated 4 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆49Updated 2 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆46Updated 4 years ago
- Video Stream Scaler☆40Updated 10 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆57Updated 3 years ago
- UART 16550 core☆32Updated 10 years ago
- Project: Precise Measure of time delays in FPGA☆28Updated 7 years ago
- Asynchronous fifo using verilog and testbench using system verilog. For asynchronous Fifo design in different module.☆31Updated 3 years ago