aniketnk / circular-queue-verilog

Related projects ⓘ

Alternatives and complementary repositories for circular-queue-verilog

• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆36Updated last year
• taneroksuz / fpu-sp
  IEEE 754 single precision floating point library in systemverilog and vhdl
  ☆26Updated last month
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆36Updated 3 years ago
• siliconcompiler / zerosoc
  Demo SoC for SiliconCompiler.
  ☆52Updated 3 weeks ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆34Updated 3 years ago
• Wren6991 / DOOMSoC
  A SoC for DOOM
  ☆16Updated 3 years ago
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆52Updated 5 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆37Updated 5 months ago
• clairexen / picorv
  PicoRV
  ☆43Updated 4 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago
• hamsternz / simple-riscv
  A simple three-stage RISC-V CPU
  ☆21Updated 3 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆79Updated 4 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆35Updated last year
• FelipeFFerreira / ITA-CORES
  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
  ☆40Updated last year
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 8 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆52Updated 3 years ago
• htfab / rotfpga
  A reconfigurable logic circuit made of identical rotatable tiles.
  ☆20Updated 3 years ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆33Updated 2 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆54Updated last month
• bwitherspoon / rv32cpu
  A RISC-V processor
  ☆13Updated 5 years ago
• MorrisMA / MiniCPU-S
  Minimal FPGA Processor Core for Stack-based CPU for CPLDs Using Bit-Serial Architecture
  ☆14Updated 11 years ago
• ZipCPU / wbspi
  A collection of SPI related cores
  ☆15Updated last week
• SpinalHDL / openocd_riscv
  Spen's Official OpenOCD Mirror
  ☆48Updated 8 months ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆64Updated 2 years ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆48Updated last year
• epsilon537 / boxlambda
  FPGA based microcomputer sandbox for software and RTL experimentation
  ☆45Updated this week
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆85Updated 4 years ago