Alternatives and similar repositories for iree-bare-metal-arm

Users that are interested in iree-bare-metal-arm are comparing it to the libraries listed below

• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆41Updated 9 months ago
• kumasento / polymer
  Bridging polyhedral analysis tools to the MLIR framework
  ☆113Updated last year
• Xilinx / mlir-air
  ☆100Updated last week
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• gvsoc / gvsoc
  ☆21Updated this week
• pnnl / COMET
  ☆40Updated this week
• NodLabs / mlir-examples
  a simple end to end example of taking a ML graph (TF2 / PyTorch) and running it on a device [cpu, gpu]
  ☆34Updated 4 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆23Updated 6 months ago
• stephenneuendorffer / vyasa
  Xilinx Modifications to Halide
  ☆13Updated 4 years ago
• UCSBarchlab / Charm
  A Language for Closed-form High-level ARchitecture Modeling
  ☆21Updated 5 years ago
• arc-research-lab / Aries
  ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)
  ☆32Updated last week
• ychen306 / vegen
  ☆30Updated 2 years ago
• nod-ai / iree-amd-aie
  IREE plugin repository for the AMD AIE accelerator
  ☆97Updated this week
• spcl / mlir-dace
  Data-Centric MLIR dialect
  ☆42Updated last year
• riscv / riscv-bfloat16
  ☆35Updated 11 months ago
• Zhao-Dongyu / sgemm_riscv
  This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…
  ☆20Updated 6 months ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆41Updated this week
• IntelLabs / t2sp
  Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
  ☆31Updated last year
• Xilinx / aie-rt
  ☆19Updated 3 weeks ago
• Dinistro / circt-stream
  A stream to RTL compiler based on MLIR and CIRCT
  ☆15Updated 2 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated 10 months ago
• andidr / teckyl
  An MLIR frontend for tensor expressions
  ☆25Updated 4 years ago
• ucb-bar / virgo
  Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC
  ☆33Updated last week
• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆79Updated last week
• polymage-labs / mlirx
  MLIRX is now defunct. Please see PolyBlocks - https://docs.polymagelabs.com
  ☆38Updated last year
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆28Updated this week
• sfu-arch / muir
  ☆24Updated 4 years ago
• heterosys / mlir-vitis
  📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.
  ☆14Updated 2 years ago
• ucb-bar / onnxruntime-riscv
  Fork of upstream onnxruntime focused on supporting risc-v accelerators
  ☆87Updated 2 years ago
• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆21Updated this week