Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter
☆41Jan 8, 2025Updated last year
Alternatives and similar repositories for vSPI
Users that are interested in vSPI are comparing it to the libraries listed below
Sorting:
- Designs for Process-Voltage-Temperature (PVT) Sensors with MCU☆24May 8, 2020Updated 5 years ago
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆20Dec 15, 2019Updated 6 years ago
- MATLAB/Octave generator of Hamming ECC coding. Output format is Verilog HDL.☆12Dec 27, 2022Updated 3 years ago
- A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen☆19Dec 5, 2014Updated 11 years ago
- A single-script repo for a script to turn a calibre layer file to a KLayout .lyp file☆13Sep 3, 2018Updated 7 years ago
- ☆11Feb 19, 2026Updated last week
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Jan 7, 2016Updated 10 years ago
- SRAM Design using OpenSource Applications☆24Jul 16, 2021Updated 4 years ago
- Simple Arduino driver for the AT86RF233 802.15.4 radio module, ported to C++ from RIOT-OS☆11Oct 14, 2017Updated 8 years ago
- SPI Slave for FPGA in Verilog and VHDL☆223May 11, 2024Updated last year
- [NeurIPS 2024] BLAST: Block Level Adaptive Structured Matrix for Efficient Deep Neural Network Inference☆17Nov 6, 2024Updated last year
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- Learn, share and collaborate on ASIC design using open tools and technologies☆14Dec 27, 2020Updated 5 years ago
- 在RISC-V处理器上实现一个轻量级的Hypervisor。☆12Dec 25, 2020Updated 5 years ago
- gaw3-20200922 fork with patches to improve remote commands sent from xschem to display waveforms☆17Mar 28, 2025Updated 11 months ago
- A Flyweight MBIST Block - FPGA synthesizable, Multi-algorithm integrated☆19Jan 27, 2019Updated 7 years ago
- Mathematical Functions in Verilog☆97Mar 7, 2021Updated 4 years ago
- dji drone id sync demod example☆17Nov 14, 2022Updated 3 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆44Apr 13, 2023Updated 2 years ago
- Token ring communication protocol for low-cost, low-power embedded devices communicating over UART☆17May 3, 2018Updated 7 years ago
- Small (Q)SPI flash memory programmer in Verilog☆69Nov 5, 2022Updated 3 years ago
- Vibe Coding A GPGPU via Cursor + Gemini3 Pro☆55Nov 23, 2025Updated 3 months ago
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆25Jul 1, 2024Updated last year
- ☆19Jul 25, 2018Updated 7 years ago
- AXI MIPI CSI2 RX FPGA core and kernel driver☆19Jul 4, 2015Updated 10 years ago
- A repository of IPs for hardware computer vision (FPGA)☆97Oct 21, 2015Updated 10 years ago
- A cheap but powerful CH55x BadUSB Cable with SL2.1s USBHUB, which makes the cable usable while executing payload. 廉价但强大,把CH552e和SL2.1s集成在…☆20Nov 23, 2022Updated 3 years ago
- Hardware implementation of ORAM☆24Jul 12, 2017Updated 8 years ago
- Tutorial for creating new OOT modules for GNU Radio that leverage pyCUDA.☆24Jul 24, 2023Updated 2 years ago
- mRNA☆26Mar 16, 2021Updated 4 years ago
- ☆29Feb 20, 2024Updated 2 years ago
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Feb 25, 2023Updated 3 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆29Aug 16, 2021Updated 4 years ago
- The FPGA design for the FreeSRP's Artix 7 FPGA☆26Apr 12, 2017Updated 8 years ago
- verilog tutorials for iCE40HX8K Breakout Board☆23Mar 2, 2016Updated 10 years ago
- Connecting FPGA and Arduino using SPI.☆25Apr 30, 2022Updated 3 years ago
- ☆28Jun 13, 2021Updated 4 years ago
- ☆30Apr 1, 2017Updated 8 years ago
- Self-driving Model Car with RPi☆10Nov 27, 2020Updated 5 years ago