CFI-Electronics-Club / TinkerCAD_Arduino
TinkerCAD Resources for Freshies Orientation 2020
☆9Updated 4 years ago
Alternatives and similar repositories for TinkerCAD_Arduino:
Users that are interested in TinkerCAD_Arduino are comparing it to the libraries listed below
- This is Circuit Solver which can solve any kind of circuit for you. Do check it out!!☆11Updated 2 years ago
- opensource EDA tool flor VLSI design☆31Updated last year
- ☆16Updated last year
- ☆13Updated 2 years ago
- RISC-V-5 stage pipelined in verilog☆11Updated 4 years ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆103Updated 2 years ago
- ☆17Updated this week
- A collection of commonly asked RTL design interview questions☆22Updated 7 years ago
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆70Updated last year
- "Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"☆13Updated last year
- A simple 8bit CPU.☆25Updated last month
- Architectural design of data router in verilog☆28Updated 5 years ago
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆13Updated 3 years ago
- ☆22Updated last year
- Verilog modules for beginners☆23Updated 2 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆9Updated 5 months ago
- This repo provide an index of VLSI content creators and their materials☆140Updated 4 months ago
- This repository contains all labs done as a part of the Embedded Logic and Design course.☆23Updated 6 years ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆164Updated 3 weeks ago
- ☆32Updated last week
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆13Updated 9 months ago
- Training Neural Networks using Analog circuits☆21Updated 4 years ago
- Single Cycle RISC MIPS Processor☆31Updated 3 years ago
- This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite☆100Updated 5 years ago
- Solve one design problem each day for a month☆39Updated last year
- Lecture about FIR filter on an FPGA☆11Updated 8 months ago
- This repo is created to include illustrative examples on object oriented design pattern in SV☆55Updated last year
- Various RTL design blocks along with verification testbenches with SVAs. Designed using SystemVerilog☆23Updated 2 years ago
- An overview of TL-Verilog resources and projects☆72Updated 10 months ago