Rishabh-zhcet / 3DOF_RoboticArmFPGALinks
This repository contains the details of controlling a 3-DOF robotic arm with 4 servo motors using FPGA. The design is execute using the Nexys-4 DDR Artix-7 FPGA of Xilinx. This repo contails all the files necessary to complete the project such as Verilog code, test bench and constrain file.
☆19Updated 3 years ago
Alternatives and similar repositories for 3DOF_RoboticArmFPGA
Users that are interested in 3DOF_RoboticArmFPGA are comparing it to the libraries listed below
Sorting:
- Image Processing Toolbox in Verilog using Basys3 FPGA☆212Updated 2 months ago
- 100 Days Of RTL is a personal challenge designed to help improve skills and knowledge in digital circuit design. The challenge involves c…☆27Updated 2 years ago
- opensource EDA tool flor VLSI design☆33Updated last year
- FPGA Design of a Neural Network for Color Detection☆77Updated 6 months ago
- "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado☆89Updated 2 years ago
- ☆114Updated last year
- Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA impleme…☆23Updated last year
- VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.☆29Updated 3 weeks ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆57Updated 2 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆27Updated 2 years ago
- ☆41Updated last year
- learn the combinational and sequential logic circuit.☆17Updated 2 weeks ago
- ☆277Updated last year
- Verilog HDL files☆147Updated last year
- RISC-V-5 stage pipelined in verilog☆10Updated 5 years ago
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆64Updated 3 years ago
- 5 stage pipeline implementation of RISC-V 32I Processor.☆11Updated 8 months ago
- This repo features a Verilog-based PID controller optimized for real-time ASIC and FPGA applications. It includes a testbench for linear …☆22Updated last year
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆19Updated 2 years ago
- FIR band-pass filter using Verilog HDL.☆12Updated 4 years ago
- This repo provide an index of VLSI content creators and their materials☆154Updated 11 months ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆113Updated 3 years ago
- ☆13Updated 8 months ago
- SystemVerilog Tutorial☆160Updated 3 months ago
- "Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"☆14Updated 2 years ago
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆26Updated last year
- Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …☆263Updated 2 months ago
- Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…☆140Updated last year
- ☆13Updated 2 years ago
- My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu☆141Updated 4 years ago