ASIC Design kit for Skywater 130 for use with mflowgen
☆15Mar 12, 2023Updated 3 years ago
Alternatives and similar repositories for skywater-130nm
Users that are interested in skywater-130nm are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Implementation of hMETIS☆12Aug 2, 2022Updated 3 years ago
- ☆10Aug 22, 2023Updated 2 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated last year
- FPGA synthesis tool powered by equality saturation and program synthesis.☆14Jan 9, 2026Updated 5 months ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- ☆35Dec 2, 2023Updated 2 years ago
- Logic circuit analysis and optimization☆51Feb 2, 2026Updated 5 months ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆26May 24, 2025Updated last year
- ☆31Apr 23, 2024Updated 2 years ago
- ☆14Jan 3, 2018Updated 8 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆59Jan 8, 2025Updated last year
- A fork of the Kissat SAT solver with additional features. Supports incremental solving.☆17Aug 13, 2022Updated 3 years ago
- SATZilla SAT feature extraction tool☆15Mar 23, 2026Updated 3 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Using e-graphs for logic synthesis (ICCAD'25)☆35Jun 11, 2026Updated 3 weeks ago
- [NeurIPS'25 Spotlight] This is the official codebase for the paper: STAR: A Benchmark for Astronomical Star Fields Super-Resolution☆18Oct 9, 2025Updated 8 months ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆44Jul 17, 2024Updated last year
- ☆19Nov 21, 2019Updated 6 years ago
- An open source SDR SDRAM controller based on the AXI4 bus and verified by FPGA and tapeout. It can support memory particles of different …☆22May 12, 2025Updated last year
- ☆37Jun 23, 2026Updated 2 weeks ago
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆26May 29, 2022Updated 4 years ago
- ☆17May 29, 2026Updated last month
- Firmware for Xilinx Platform Cable 1 USB Jtag adapter☆10Jul 24, 2016Updated 9 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A Python/C++ implementation of Quine McCluskey(Tabulation) method.☆12Aug 31, 2018Updated 7 years ago
- Kindle Fire u-boot☆16Jun 7, 2015Updated 11 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Logic Synthesis System from UC Berkeley (Unofficial Distribution)☆15Jun 4, 2019Updated 7 years ago
- RTL generator for SpGEMM☆12Feb 2, 2021Updated 5 years ago
- ☆15Sep 13, 2024Updated last year
- RISC-V RV32IMAFC Core for MCU☆44May 20, 2026Updated last month
- Tiny framework for solving constraint satisfaction problems (CSP) with discrete and finite domains. This is a Scala-based port of the ori…☆10May 13, 2016Updated 10 years ago
- The GraphBench package.☆35Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Converting Boolean expressions to CMOS Circuits☆11Oct 6, 2020Updated 5 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- Code for the paper "LLM Meets Bounded Model Checking: Neuro-symbolic Loop Invariant Inference" at ASE 2024☆30Sep 3, 2024Updated last year
- IDEA project source files☆114Apr 15, 2026Updated 2 months ago
- This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".☆27Jul 12, 2023Updated 2 years ago
- (ARM Thumb) Re-Assembler utility for reverse engineering☆17May 6, 2018Updated 8 years ago
- ☆14Oct 8, 2024Updated last year