Avnet / vitisLinks
Vitis Repository for Avnet Designs
☆9Updated 2 months ago
Alternatives and similar repositories for vitis
Users that are interested in vitis are comparing it to the libraries listed below
Sorting:
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆30Updated 5 years ago
- PYNQ Composabe Overlays☆72Updated 11 months ago
- ☆94Updated 11 months ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 4 years ago
- PYNQ Bootcamp 2019-2024 teaching materials.☆47Updated 5 months ago
- Kria Vitis platforms and overlays☆101Updated 3 weeks ago
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆29Updated 7 months ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆105Updated 7 years ago
- Board files to build Ultra 96 PYNQ image☆154Updated 5 months ago
- How to Accelerate an Image Upscaling CNN on FPGA Using HLS☆24Updated 3 years ago
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago