My notes for DDR3 SDRAM controller
☆53Feb 23, 2023Updated 3 years ago
Alternatives and similar repositories for DDR3-Notes
Users that are interested in DDR3-Notes are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆32Dec 31, 2022Updated 3 years ago
- Opensource DDR3 Controller☆437Jan 18, 2026Updated 4 months ago
- Build edk2 development and debugging environment under win10, for recording some notes and writing self tools.☆13Aug 14, 2022Updated 3 years ago
- This is a repo containing ARM-Cortex-M0 based SOC designs implemented on the Nexus-4-DDR , Nexus-4 and the ARTY - A7 FPGA platforms.☆12Sep 6, 2023Updated 2 years ago
- ☆13Dec 1, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A simple OpenGL 3.2 example using MSVS 2010 and freeglut☆12Feb 4, 2013Updated 13 years ago
- ☆11Jul 2, 2021Updated 4 years ago
- This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specificatio…☆33Jan 23, 2024Updated 2 years ago
- A fork of https://ixo-jtag.sourceforge.net/ with a CPLD design fix☆16Jul 27, 2024Updated last year
- ROM Dumps of my retro hardwares☆16Dec 13, 2022Updated 3 years ago
- Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board☆23Nov 17, 2021Updated 4 years ago
- Generate bitstream from FPGA assembly.☆28Feb 23, 2026Updated 3 months ago
- SATA sniffing☆15Jul 28, 2022Updated 3 years ago
- Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)☆11May 25, 2016Updated 9 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Core ML Demos is an experimental Core ML app. It visualizes the inference results of ML models and can be used to benchmark ML models and…☆12Jan 8, 2026Updated 4 months ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆22Feb 4, 2025Updated last year
- Tiny programs from various sources, for testing softcores☆140Aug 14, 2025Updated 9 months ago
- The controller is a Verilog implementation through a state machine structure per Micro datasheet specifications, and connected to a prede…☆25Jul 6, 2018Updated 7 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆591Oct 10, 2021Updated 4 years ago
- CVA6 softcore contest☆24Apr 17, 2026Updated last month
- Collection of Open Source IoT Designs☆10Apr 4, 2025Updated last year
- ☆11Jan 2, 2026Updated 4 months ago
- ☆18Jun 3, 2017Updated 8 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- ☆116Jan 22, 2023Updated 3 years ago
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆74May 13, 2026Updated last week
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆72Apr 14, 2024Updated 2 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆73Jul 25, 2023Updated 2 years ago
- Manythread RISC-V overlay for FPGA clusters☆39Sep 16, 2025Updated 8 months ago
- Waveform Generator☆12Jul 18, 2022Updated 3 years ago
- SystemVerilog code for image processing tasks like demosaicing☆12Jun 28, 2020Updated 5 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- Nix flake for openXC7☆49Mar 2, 2026Updated 2 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Prepare and optimize your KiCad PCB design for simulation with OpenEMS (https://github.com/thliebig/openEMS)☆31Apr 23, 2026Updated last month
- LiteX based White Rabbit PCIe NIC developped for Warsaw University of Technology.☆23Updated this week
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆35Dec 10, 2021Updated 4 years ago
- Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)☆99Oct 17, 2025Updated 7 months ago
- A verilog hardware description model of LLM for FPGA / SoC - runs newest LLM models☆24Jan 24, 2026Updated 3 months ago
- The memory model was leveraged from micron.☆30Mar 24, 2018Updated 8 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆39Jan 11, 2026Updated 4 months ago