AlbertYang0112 / DPLL-FPGA
A digital phase-locked loop implemented on Spartan-6
☆12Updated 6 years ago
Related projects ⓘ
Alternatives and complementary repositories for DPLL-FPGA
- High Radix Adaptive CORDIC Algorithm - Improvement over Traditional CORDIC☆12Updated 8 years ago
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆17Updated 11 months ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆67Updated 2 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆29Updated 4 years ago
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆39Updated 3 years ago
- A CORDIC implementation of square root Verilog calculation on Quartus Prime 16.0, with ability to simulate on ModelSim as well.☆13Updated 3 years ago
- configurable cordic core in verilog☆47Updated 10 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆45Updated 2 years ago
- APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS☆24Updated last year
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆24Updated 3 years ago
- FIR filter implementation☆21Updated 4 years ago
- Design and implementation of an 8-bit SAR (Successive Approximation Register) ADC☆21Updated 6 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆37Updated 4 months ago
- All digital PLL☆24Updated 6 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆41Updated 2 years ago
- 基于Verilog实现的全数字锁相环☆24Updated 2 years ago
- FPGA Technology Exchange Group相关文件管理☆39Updated 11 months ago
- LMS sound filtering by Verilog☆35Updated 4 years ago
- AD7606 driver verilog☆37Updated 5 years ago
- An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。☆20Updated 2 months ago
- PID controller with FPGA hardware☆18Updated 5 years ago
- 一个FPGA核心板设计,体积小、低成本、易用、扩展性强。☆76Updated last year
- FPGA 同步FIFO与异步FIFO☆28Updated 5 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆53Updated 2 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆50Updated 3 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆29Updated 6 years ago
- 【例程】国产高云FPGA 开发板及其工程☆23Updated last month
- SPI-Flash XIP Interface (Verilog)☆35Updated 3 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆26Updated 3 years ago
- A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board☆33Updated 2 years ago