lvgl / lv_port_xilinx_zedboard_vitisLinks
This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals
☆27Updated 2 years ago
Alternatives and similar repositories for lv_port_xilinx_zedboard_vitis
Users that are interested in lv_port_xilinx_zedboard_vitis are comparing it to the libraries listed below
Sorting:
- Audio controller (I2S, SPDIF, DAC)☆89Updated 6 years ago
- AD7606 driver verilog☆45Updated 6 years ago
- USB Full Speed PHY☆46Updated 5 years ago
- Basic USB-CDC device core (Verilog)☆80Updated 4 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆72Updated 3 years ago
- Simple mono FM Radio.☆48Updated 9 years ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆75Updated 3 years ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆120Updated 4 years ago
- This is xc7z020clg400 FPGA hardware core board design☆60Updated last year
- I2S transciever implemented in Verilog HDL☆32Updated 8 years ago
- USB 2.0 Device IP Core☆69Updated 8 years ago
- VHDL Modules☆24Updated 10 years ago
- A series of CORDIC related projects☆115Updated 11 months ago
- SPI-Flash XIP Interface (Verilog)☆45Updated 3 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆93Updated 4 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆64Updated last year
- USB serial device (CDC-ACM)☆41Updated 5 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆56Updated 2 years ago
- Test code to talk from STM32 MCU over FSMC to SDRAM on ICE40 FPGA☆28Updated 8 years ago
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆87Updated 2 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆66Updated 4 years ago
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- turbo 8051☆29Updated 8 years ago
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆53Updated 4 years ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆69Updated 8 years ago
- FPGA Logic Analyzer and GUI☆140Updated 2 years ago
- A collection of demonstration digital filters☆156Updated last year
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆93Updated 5 years ago
- sliding DFT for FPGA, targetting Lattice ICE40 1k☆76Updated 5 years ago