This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals
☆31Oct 12, 2023Updated 2 years ago
Alternatives and similar repositories for lv_port_xilinx_zedboard_vitis
Users that are interested in lv_port_xilinx_zedboard_vitis are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- libopencm3 c++ wrappers☆10Dec 25, 2020Updated 5 years ago
- PIC32MX Open-Source Toolchain☆10Feb 17, 2024Updated 2 years ago
- DVB-S2 LDPC Decoder☆31Jul 17, 2014Updated 12 years ago
- Tutorial on how to boot Zephyr on the Avnet/Digilent Zedboard, includes building a FPGA bitstream and the First Stage Boot Loader (FSBL)☆20Sep 21, 2024Updated last year
- ☆17Apr 7, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Implementation of fLaC encoder/decoder for FPGA☆31Oct 31, 2018Updated 7 years ago
- A LVGL porting for Cortex-M55 running on an Arm official FPGA prototyping development board called MPS3 (AN547), see Figure 1. It is also…☆20Oct 14, 2025Updated 10 months ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆21May 30, 2019Updated 7 years ago
- cadence allegro封装库,通过提供的安装说明文档配置数据库,支持局域网共享☆28Feb 27, 2020Updated 6 years ago
- How the low level init in ARM Cortex processors work?☆12Jan 29, 2016Updated 10 years ago
- This is a multi-core processor specially designed for matrix multiplication using Verilog HDL.☆12Jan 8, 2022Updated 4 years ago
- BMP decoder library for LVGL☆12Jun 24, 2025Updated last year
- Implements Mutex, Semaphore and exclusive ReadModifyWrite operations on ARM Cortex-M3 and Cortex-M4☆11Feb 28, 2019Updated 7 years ago
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- LimeSDR ExtIO Plugin for HDSDR☆16Jul 29, 2020Updated 6 years ago
- A Python 3 C++ extension to simplify development using USRP software-defined radios.☆12Mar 16, 2026Updated 5 months ago
- A generic LCD Library for Arduino☆17May 14, 2013Updated 13 years ago
- Extension to operate Matlab in VS Code☆10Sep 15, 2022Updated 3 years ago
- A more convenient cli shell base on FreeRTOS+CLI☆12Aug 19, 2022Updated 4 years ago
- RCP over DDS C++ API☆13Jan 27, 2016Updated 10 years ago
- A library to read and play back MIDI files☆30Aug 24, 2022Updated 4 years ago
- Store the openwifi FPGA img (.xsa .ltx) and the related git info☆19Aug 6, 2025Updated last year
- GIF library for LVGL☆37Jun 24, 2025Updated last year
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Coarse Grained Reconfigurable Arrays with Chisel3☆11Jul 1, 2024Updated 2 years ago
- Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM☆18Nov 11, 2022Updated 3 years ago
- ☆15May 22, 2019Updated 7 years ago
- An Inexpensive Vector Network Analyzer Project for the Walla Walla University Electronics II Class☆12Jun 10, 2019Updated 7 years ago
- ☆21Aug 4, 2015Updated 11 years ago
- Phased Array Radar☆13Aug 15, 2012Updated 14 years ago
- LTE Turbo Decoder using BCJR algorithm☆10Apr 8, 2018Updated 8 years ago
- 本项目是一个只有6个C#代码文件的开源小工程,用来学习基于TCP的套接字通信包,可以自定义通信协议,处理分包和粘包,内置一个服务端和客户端的套接字程序,也有测试代码和对应的博客讲解代码。整个工程基本基于良好的面向对象思想,代码注释清晰简洁。☆12Apr 8, 2021Updated 5 years ago
- Class for scoped protection against denormal numbers in pure C++☆10Jul 28, 2019Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Nuleo64 EtherCAT Board☆20Jun 3, 2017Updated 9 years ago
- Quite OK image compression Verilog implementation☆24Nov 27, 2024Updated last year
- ☆20Nov 17, 2020Updated 5 years ago
- Mini RISC-V CPU☆11Dec 26, 2019Updated 6 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- SystemVerilog package for reading, manipulating, and writing JSON-formatted data☆12Feb 19, 2022Updated 4 years ago
- ☆18Dec 13, 2022Updated 3 years ago