shivarajagopal / ece5775-finalLinks
Voice Recognition using FPGA-Based Neural Networks
☆13Updated 9 years ago
Alternatives and similar repositories for ece5775-final
Users that are interested in ece5775-final are comparing it to the libraries listed below
Sorting:
- Adding PR to the PYNQ Overlay☆18Updated 8 years ago
- Scripts to automate the process of building an image for the Xilinx PYNQ project. This repository is deprecated as its functionality is n…☆20Updated 8 years ago
- Parallel Array of Simple Cores. Multicore processor.☆99Updated 6 years ago
- iDEA FPGA Soft Processor☆15Updated 9 years ago
- A multi-board Extended Kalman Filter (EKF)☆31Updated 6 years ago
- ☆109Updated 6 years ago
- Image Processing on FPGA using VHDL☆41Updated 11 years ago
- Networking Overlay on PYNQ☆49Updated 6 years ago
- Expiremental Speech Recognition System using VHDL & MATLAB.☆47Updated 7 years ago
- ☆84Updated 5 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog☆197Updated 6 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆48Updated 8 years ago
- Collection of hardware description languages writings and code snippets☆27Updated 10 years ago
- Collection of open-source peripherals in Verilog☆181Updated 3 years ago
- A collection of awesome MyHDL tutorials, projects and third-party tools.☆93Updated 4 years ago
- Python tools for Vivado Projects☆73Updated 6 years ago
- SDSoC platforms for Digilent Zynq boards☆12Updated 8 years ago
- Zynq PR Management☆13Updated 9 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆29Updated 8 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆46Updated 10 years ago
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆60Updated 5 months ago
- A ZipCPU SoC for the Nexys Video board supporting video functionality☆18Updated 9 months ago
- Designing Relocatable FPGA Partitions with Vivado Design Suite☆10Updated 7 years ago
- Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).☆61Updated 3 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆12Updated 7 years ago
- Support for zScale on Spartan6 FPGAs☆16Updated 10 years ago
- PYNQ, Neural network Language model, Overlay☆110Updated 6 years ago
- RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards☆102Updated 6 years ago
- Core description files for FuseSoC☆124Updated 5 years ago