Alternatives and similar repositories for ece5775-final

Users that are interested in ece5775-final are comparing it to the libraries listed below

• PeterOgden / PYNQ_image
  Scripts to automate the process of building an image for the Xilinx PYNQ project. This repository is deprecated as its functionality is n…
  ☆20Updated 8 years ago
• jbush001 / PASC
  Parallel Array of Simple Cores. Multicore processor.
  ☆100Updated 6 years ago
• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 8 years ago
• jpiat / hard-cv
  A repository of IPs for hardware computer vision (FPGA)
  ☆96Updated 9 years ago
• MohammedRashad / FPGA-Speech-Recognition
  Expiremental Speech Recognition System using VHDL & MATLAB.
  ☆45Updated 7 years ago
• DigilentInc / vivado-library
  ☆35Updated 7 years ago
• delhatch / Zynq_UDP
  Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.
  ☆26Updated 4 years ago
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆101Updated 6 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆108Updated 5 years ago
• warclab / idea
  iDEA FPGA Soft Processor
  ☆16Updated 9 years ago
• devbisme / myhdl-resources
  A collection of awesome MyHDL tutorials, projects and third-party tools.
  ☆93Updated 4 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆46Updated 9 years ago
• laurivosandi / hdl
  Collection of hardware description languages writings and code snippets
  ☆27Updated 10 years ago
• sfox14 / pynq-ekf
  A multi-board Extended Kalman Filter (EKF)
  ☆32Updated 6 years ago
• agostini01 / FPGA_Neural-Network
  The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…
  ☆29Updated 8 years ago
• umaurmi / OPENCL_EXAMPLES_ZEDBOARD
  This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.
  ☆16Updated 9 years ago
• nelsoncsc / sv_image
  Reusable image processing modules in SystemVerilog
  ☆33Updated 7 years ago
• torc-isi / torc
  Torc: Tools for Open Reconfigurable Computing
  ☆39Updated 8 years ago
• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆33Updated 6 years ago
• silicontalks01 / OpenDLA
  A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.
  ☆15Updated 7 years ago
• FPGAwars / FPGA-peripherals
  Collection of open-source peripherals in Verilog
  ☆179Updated 3 years ago
• openrisc / orpsoc-cores
  Core description files for FuseSoC
  ☆124Updated 5 years ago
• cebarnes / cordic
  An implementation of the CORDIC algorithm in Verilog.
  ☆98Updated 6 years ago
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆194Updated 6 years ago
• BG2BKK / img_process_vhdl
  Image Processing on FPGA using VHDL
  ☆41Updated 10 years ago
• fpgadeveloper / ethernet96
  Ethernet Mezzanine Card for the Ultra96
  ☆14Updated last year
• andrade824 / Verilog-SPI-Master
  A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen
  ☆19Updated 10 years ago
• ReconOS / reconos
  ReconOS - Operating System for Reconfigurable Hardware
  ☆29Updated 3 years ago
• ztgao / ConvNN_FPGA_Accelerator
  ☆14Updated 9 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆65Updated 7 years ago