xprova / netlist-graphLinks
Java library for parsing and manipulating graph representations of gate-level Verilog netlists
☆14Updated 8 years ago
Alternatives and similar repositories for netlist-graph
Users that are interested in netlist-graph are comparing it to the libraries listed below
Sorting:
- A library and command-line tool for querying a Verilog netlist.☆28Updated 3 years ago
- Collection of test cases for Yosys☆17Updated 3 years ago
- netlistDB - Intermediate format for digital hardware representation with graph database API☆31Updated 4 years ago
- CMake based hardware build system☆31Updated last week
- A collection of big designs to run post-synthesis simulations with yosys☆49Updated 10 years ago
- SCARV: a side-channel hardened RISC-V platform☆27Updated 2 years ago
- ☆18Updated 5 years ago
- A fault-injection framework using Chisel and FIRRTL☆36Updated last month
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆25Updated this week
- Intel Compiler for SystemC☆25Updated 2 years ago
- The PE for the second generation CGRA (garnet).☆17Updated 6 months ago
- Implementation of the Advanced Encryption Standard in Chisel☆19Updated 3 years ago
- ☆20Updated last year
- KLayout technology files for ASAP7 FinFET educational process☆21Updated 2 years ago
- A basic documentation generator for Verilog, similar to Doxygen.☆13Updated 9 years ago
- An open source PDK using TIGFET 10nm devices.☆51Updated 2 years ago
- Hardware Formal Verification☆16Updated 5 years ago
- Parsing library for BLIF netlists☆19Updated last year
- ☆20Updated 4 years ago
- Provides a packaged collection of open source EDA tools☆12Updated 6 years ago
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆34Updated 5 years ago
- A Python package for testing hardware (part of the magma ecosystem)☆45Updated last year
- IRSIM switch-level simulator for digital circuits☆34Updated 6 months ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- ☆44Updated 5 years ago
- A configurable SRAM generator☆56Updated 2 months ago
- EDA wiki☆53Updated 2 years ago
- ☆32Updated 2 years ago
- Cross EDA Abstraction and Automation☆40Updated last week
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year