Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
☆62Mar 5, 2023Updated 3 years ago
Alternatives and similar repositories for xv6-riscv-fpga
Users that are interested in xv6-riscv-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Port of MIT's xv6 OS to 32 bit RISC V☆44Jun 13, 2022Updated 3 years ago
- A simple risc-v CPU /GPU running on an Arty A7-100T FPGA board☆33Jun 30, 2021Updated 4 years ago
- Armbian build tools☆11Apr 6, 2020Updated 5 years ago
- ☆19Jul 12, 2024Updated last year
- RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆16Mar 3, 2026Updated 3 weeks ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- ✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.☆39Feb 22, 2026Updated last month
- Contents from Solaris 8 Source Foundation☆11Oct 11, 2021Updated 4 years ago
- RISC-V RV32I CPU written in verilog☆10Jul 11, 2020Updated 5 years ago
- ☆10Dec 17, 2022Updated 3 years ago
- VGA-compatible text mode functionality☆17May 16, 2020Updated 5 years ago
- A tiny 3-stage RISC-V core written in Chisel.☆16Apr 14, 2023Updated 2 years ago
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆20Apr 7, 2025Updated 11 months ago
- Minimal ZX Spectrum for Ulx3s ECP5 board☆12May 7, 2020Updated 5 years ago
- A highly-configurable RISC-V Core☆35Dec 27, 2025Updated 3 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Endlos Computer☆11Sep 12, 2024Updated last year
- ☆10Jun 9, 2022Updated 3 years ago
- RISC-V RV32E core designed for minimal area☆26Nov 17, 2024Updated last year
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆40Feb 16, 2026Updated last month
- "One Man Unix", archive of the Unix clone written (before Linus !) by the late Dr Steve Hosgood, and extended by Terry Barnaby☆58Dec 5, 2016Updated 9 years ago
- ☆39Sep 17, 2022Updated 3 years ago
- This is the CORE-V MCU DevKit project, hosting the open-source artifacts for the CORE-V MCU Development Kit.☆18Jan 31, 2024Updated 2 years ago
- The code for an FPGA softcore comparison☆11Jun 21, 2020Updated 5 years ago
- Isle FPGA Computer☆81Updated this week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- RISC-V Playground on Nandland Go☆16Mar 2, 2023Updated 3 years ago
- Git conversion of UCB CSRG's BSD SCCS files: BSD Unix source code history☆21Dec 3, 2019Updated 6 years ago
- Research UNIX v7 ported the the Raspberry Pi☆69Dec 9, 2022Updated 3 years ago
- Port of the xv6 OS to the VisionFive 2 RISC V board☆24Mar 26, 2023Updated 3 years ago
- Description of a RISC-V architecture based on MIPS 3000☆13Apr 24, 2023Updated 2 years ago
- The SunOS 4.1.3 source code.☆13May 14, 2023Updated 2 years ago
- Linux capable RISC-V SoC designed to be readable and useful.☆159Dec 19, 2025Updated 3 months ago
- 64bit port of xv6☆140Sep 22, 2019Updated 6 years ago
- SAR ADC on tiny tapeout☆49Jan 29, 2025Updated last year
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A project to port the si5351 clock library to micropython☆17Dec 2, 2024Updated last year
- The UNIX System V Release 4 source code for the AT&T 3B2☆16Nov 5, 2022Updated 3 years ago
- Synthesizable Uxn CPU☆17Jul 14, 2022Updated 3 years ago
- Kakao Linux☆39May 30, 2025Updated 9 months ago
- A simple 6502 system built on a Lattice Ultra Plus 5k FPGA☆15Mar 11, 2019Updated 7 years ago
- Verilog+VHDL Hierarchy Management tool ( IDE ) wraps around Vim, runs in Linux terminal window.☆12Jan 15, 2017Updated 9 years ago
- This repository is the original work of Paul Nankervis and originally lived at this location: https://skn.noip.me/pdp11/pdp11.html☆15Nov 23, 2022Updated 3 years ago