EE 287 2012 Fall
☆34Mar 11, 2013Updated 13 years ago
Alternatives and similar repositories for ASIC
Users that are interested in ASIC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- CNN-Accelerator based on FPGA developed by verilog HDL.☆11Jan 27, 2022Updated 4 years ago
- Simple BLE demo using an iOS app (SwiftUI), an ESP32 (Python) and an FPGA (Verilog)☆17Dec 12, 2020Updated 5 years ago
- Project 2.2 Frequency counter☆12May 30, 2025Updated last year
- Base on Synopsys platform using VCS,DC,ICC,PT.☆11May 29, 2021Updated 5 years ago
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆23Apr 15, 2021Updated 5 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆53Dec 3, 2023Updated 2 years ago
- RV32I by cats☆15Sep 4, 2023Updated 3 years ago
- MIPS Processor, BNN Accelerator, AXI4 interface, Cache Controller and LRU replacement☆16Nov 4, 2022Updated 3 years ago
- ☆42Apr 20, 2023Updated 3 years ago
- Implementation of a binary search tree algorithm in a FPGA/ASIC IP☆21Sep 5, 2021Updated 5 years ago
- ☆16Jan 9, 2022Updated 4 years ago
- Cypress USB Suite SDK☆37Jul 25, 2017Updated 9 years ago
- SystemVerilog for Verification A Guide to Learning the Testbench Language Features Third Edition中文翻译☆22Jan 10, 2022Updated 4 years ago
- Thread safe gcc function entry/exit tracer and call graph generator☆14Dec 22, 2015Updated 10 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A wishbone controlled PWM (audio) controller☆19Jan 16, 2024Updated 2 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆31Nov 5, 2021Updated 4 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆25Dec 10, 2019Updated 6 years ago
- NVIDIA GPU Computing SDK 4.2.9. Fixing some stupid compilation bugs in the make files of the projects.☆18Jul 3, 2012Updated 14 years ago
- A dedicated graphical processor for ray tracing☆22Jun 7, 2021Updated 5 years ago
- Converting Boolean expressions to CMOS Circuits☆11Oct 6, 2020Updated 5 years ago
- Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV☆12Aug 9, 2026Updated last month
- This repo is for Edge Vision SoC framework, which facilitates quick porting of users' design for Edge AI and Vision solutions.☆35Jul 1, 2026Updated 2 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆11Nov 5, 2019Updated 6 years ago
- SystemVerilog Design Patterns☆26Mar 11, 2015Updated 11 years ago
- Tiny CPU is a small 32-bit CPU done mostly as a hobby for educational purposes.☆36Jan 17, 2012Updated 14 years ago
- UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…☆17Dec 23, 2024Updated last year
- Fork of gem5 with a gem5-gpu specific branch. See gem5.org for more information.☆14Jun 7, 2017Updated 9 years ago
- ☆13Mar 5, 2024Updated 2 years ago
- Python script to dump profile pictures of friends/random people☆16Aug 14, 2016Updated 10 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆134Feb 22, 2024Updated 2 years ago
- This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.☆12Dec 31, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Design of BandGapReference Circuit using Sky130 PDK☆12Oct 30, 2021Updated 4 years ago
- Minimal explained Gnuplot examples. Compiled outputs: http://www.cirosantilli.com/gnuplot-examples-gh-pages/☆18Jan 1, 2025Updated last year
- a hardware task scheduler design☆10Sep 14, 2022Updated 4 years ago
- Lecture Material on Deep Learning Inference using FPGA☆13Jun 9, 2020Updated 6 years ago
- Reusable image processing modules in SystemVerilog☆33Aug 7, 2017Updated 9 years ago
- A vim plugin and cli tool to generate vim helpfile from markdown☆26May 10, 2014Updated 12 years ago
- Yet another free 8051 FPGA core☆39Sep 16, 2018Updated 8 years ago