Verilog implementation of a pre-trained handwritten digit recognition simple neural network.
☆30Dec 26, 2023Updated 2 years ago
Alternatives and similar repositories for verilog-neural-network
Users that are interested in verilog-neural-network are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Verilog implementation of a hand-written digit recognition Neural Network☆10Nov 16, 2024Updated last year
- ☆28Feb 5, 2020Updated 6 years ago
- Neuromorphic ASIC with 96 neurons on Tiny Tapeout 7☆11May 25, 2024Updated last year
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆18Oct 11, 2019Updated 6 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- A dec-bin converter uses 2's complement.☆10Sep 24, 2024Updated last year
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆20Jun 17, 2020Updated 5 years ago
- ☆12Jul 7, 2020Updated 5 years ago
- CVA6 softcore contest☆22Mar 9, 2026Updated 2 weeks ago
- 最小和算法实现☆10Jul 12, 2020Updated 5 years ago
- ☆12Jun 8, 2018Updated 7 years ago
- Single-Cycle RISC-V Processor using SystemVerilog on a Nexys A7 (Artix-7) FPGA. Project includes complete datapath and control logic with…☆17Jul 21, 2025Updated 8 months ago
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.☆16Updated this week
- Final project for Computer Architecture FA16☆20Jan 5, 2017Updated 9 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆56Jul 9, 2021Updated 4 years ago
- Trying to learn Wishbone by implementing few master/slave devices☆13Jan 7, 2019Updated 7 years ago
- An open silicon CHERIoT Ibex microcontroller chip☆18May 23, 2025Updated 10 months ago
- My 32-bit RISC CPU for smallish FPGAs☆19Apr 20, 2022Updated 3 years ago
- Class Project - Digital Signal Processing☆15Jun 22, 2021Updated 4 years ago
- ☆21Nov 12, 2025Updated 4 months ago
- 关于深度学习算法、框架、编译器、加速器的一些理解☆16Jul 2, 2022Updated 3 years ago
- VGA Tutorial for DE1☆16Apr 21, 2015Updated 10 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- This repo is to inplemente the riscv soc on the xilinx pynq-z2 board☆12Dec 6, 2023Updated 2 years ago
- Design of an image generator to represent a street scene. Can be used as a stand-alone design for image generator or as a test pattern ge…☆11Nov 18, 2019Updated 6 years ago
- ☆12Aug 3, 2021Updated 4 years ago
- A Mel-frequency cepstrum core in FPGA☆22Jun 30, 2021Updated 4 years ago
- APB Logic☆24Feb 24, 2026Updated last month
- This is a SpyDrNet Plugin for a physical design related transformations☆16Jun 13, 2025Updated 9 months ago
- A template-based, layer-oriented High Level Synthesis Tool for AI algorithms☆14Updated this week
- VHDL sources for a BT.656 to axi4-stream converter☆12Mar 20, 2023Updated 3 years ago
- simple wishbone client to read buttons and write leds☆19Nov 30, 2023Updated 2 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- An automated HDC platform☆11Mar 16, 2026Updated last week
- This repository provides a Linux kernel driver for AXI UART Lite accessed via PCIe XDMA. It enables efficient DMA-based UART communicatio…☆16May 2, 2025Updated 10 months ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆39Feb 18, 2024Updated 2 years ago
- This project contains Verilog designs and a PCB for the implementation of CSI-2 camera interface to HDMI bridge on a Gatemate FPGA from C…☆19Jul 28, 2025Updated 8 months ago
- We open-source our layout level fast EM simulation tool, EMSim, to the public.☆14Feb 8, 2024Updated 2 years ago
- Digital IC design and vlsi notes☆13Jun 24, 2020Updated 5 years ago
- Implementation of a Systolic Array based sorting engine on an FPGA using Verilog☆11May 11, 2017Updated 8 years ago