Verilog implementation of a pre-trained handwritten digit recognition simple neural network.
☆35Dec 26, 2023Updated 2 years ago
Alternatives and similar repositories for verilog-neural-network
Users that are interested in verilog-neural-network are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Spiking Neuron Network Project in Verilog Implementation☆28Apr 5, 2018Updated 8 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆60Jul 9, 2021Updated 5 years ago
- A Verilog implementation of a hand-written digit recognition Neural Network☆11Nov 16, 2024Updated last year
- ☆15Apr 8, 2023Updated 3 years ago
- Tensor Processing Unit implementation in Verilog☆16Aug 12, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆28Feb 5, 2020Updated 6 years ago
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆19Oct 11, 2019Updated 6 years ago
- Neuromorphic ASIC with 96 neurons on Tiny Tapeout 7☆11May 25, 2024Updated 2 years ago
- CARLsim is an efficient, easy-to-use, GPU-accelerated software framework for simulating large-scale spiking neural network (SNN) models w…☆17May 17, 2022Updated 4 years ago
- A dec-bin converter uses 2's complement.☆10Sep 24, 2024Updated last year
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- ☆21Mar 19, 2024Updated 2 years ago
- Low-latency branching for heralded remote entanglement generation (ARTIQ).☆10Nov 22, 2023Updated 2 years ago
- My implementation of an FPGA Deep Neural Network Hardware Accelerator, moved from my bitbucket☆30Jul 31, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This repository contains all the materials related to the basic MOSFET theory, CMOS technology, circuit and layout design, and basic PDK …☆15Dec 15, 2023Updated 2 years ago
- 알고리즘 정리☆11Apr 18, 2023Updated 3 years ago
- A minimal neuromorphic chip design in SystemVerilog to learn how brain-inspired computing works from the ground up.☆29Mar 30, 2026Updated 4 months ago
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆39Aug 13, 2024Updated 2 years ago
- This repository contains the details and the code for the MIPS32 ISA based RISC Processor, which is implemented in 5 stage pipelined conf…☆20Apr 26, 2023Updated 3 years ago
- 最小和算法实现☆10Jul 12, 2020Updated 6 years ago
- Implementation of CNN using Verilog☆248Oct 13, 2017Updated 8 years ago
- Class Project - Digital Signal Processing☆15Jun 22, 2021Updated 5 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆28Apr 18, 2019Updated 7 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A light-weight hardware oriented synchronous stream cipher.☆12Mar 19, 2022Updated 4 years ago
- An automated HDC platform☆11Mar 16, 2026Updated 5 months ago
- ☆12Jun 8, 2018Updated 8 years ago
- A Keras code on Binary Neural Networks☆21Dec 5, 2022Updated 3 years ago
- Little RISC-V 3-stage Pipeline CPU☆16Jun 14, 2021Updated 5 years ago
- Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation inc…☆37Mar 23, 2024Updated 2 years ago
- Trying to learn Wishbone by implementing few master/slave devices☆13Jan 7, 2019Updated 7 years ago
- The project involves the design of a 4X4 (16-bit) SRAM Memory Array using Cadence Virtuoso☆66Mar 21, 2024Updated 2 years ago
- Superscalar Out-of-Order NPU Design on FPGA☆16May 17, 2024Updated 2 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆168Dec 13, 2020Updated 5 years ago
- UVM☆14Mar 16, 2020Updated 6 years ago
- Deep Spiking Convolutional Neural Network for Epilepsy Detection☆11May 14, 2020Updated 6 years ago
- Final project for Computer Architecture FA16☆20Jan 5, 2017Updated 9 years ago
- Build a spiking convolutional neural network in tensorflow for image recognitioon tasks☆11Apr 9, 2019Updated 7 years ago
- Some beginner projects using verilog HDL, along with some documentation on basic syntax☆14Jun 13, 2021Updated 5 years ago
- VGA Tutorial for DE1☆16Apr 21, 2015Updated 11 years ago