matrix-io / matrix-creator-fpga
Reference HDL code for the MATRIX Creator's Spartan 6 FPGA
☆28Updated 5 years ago
Alternatives and similar repositories for matrix-creator-fpga:
Users that are interested in matrix-creator-fpga are comparing it to the libraries listed below
- Open Source ZYNQ Board☆31Updated 9 years ago
- Altera Cyclone IV FPGA project for the PCIe LimeSDR board☆38Updated 2 years ago
- A CIC filter implemented in Verilog☆22Updated 9 years ago
- RFID tag and tester in Verilog☆37Updated 11 years ago
- Connecting FPGA and MCU using Ethernet RMII☆23Updated 9 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆42Updated 11 months ago
- A ZipCPU based demonstration of the MAX1000 FPGA board☆21Updated 3 years ago
- FPGA development platform for high-performance RF and digital design☆32Updated 9 years ago
- JESD204B core for Migen/MiSoC☆36Updated 3 years ago
- HDL code for the MATRIX Voice's Spartan 6 FPGA http://voice.matrix.one☆22Updated last year
- Extensible FPGA control platform☆59Updated last year
- A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board☆12Updated 6 years ago
- development interface mil-std-1553b for system on chip☆21Updated 7 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 5 years ago
- tinyVision.ai Vision & Sensor FPGA System on Module☆46Updated 3 years ago
- OscillatorIMP ecosystem FPGA IP sources☆27Updated last week
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆32Updated 7 years ago
- A FPGA accelerated SDR receiver using PYNQ-Z2 board and RTL-SDR☆20Updated 5 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆30Updated 7 years ago
- Making Lattice SensAI work properly on tinyVision products☆11Updated 2 years ago
- Small footprint and configurable JESD204B core☆42Updated 2 months ago
- FPGArduino source☆68Updated 5 years ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆67Updated 7 years ago
- Verilog IP Cores & Tests☆13Updated 6 years ago
- ☆18Updated 9 years ago
- Design to connect Lattice Ultraplus FPGA to OV7670 Camera Module☆21Updated 7 years ago
- An open-source Xilinx Kria SOM Carrier for high-speed camera design☆22Updated last year
- RISC-V 32-bit core for MCCI Catena 4710☆10Updated 5 years ago
- VHDL/FPGA/OV7670☆31Updated 9 years ago
- This repository contains a set of examples of opencl code that can run on the zedboard zynq all programmable soc.☆16Updated 9 years ago