daniellustig / coatcheckLinks
COATCheck
☆13Updated 6 years ago
Alternatives and similar repositories for coatcheck
Users that are interested in coatcheck are comparing it to the libraries listed below
Sorting:
- ☆19Updated 10 years ago
- RTLCheck☆22Updated 6 years ago
- Iodine: Verifying Constant-Time Execution of Hardware☆13Updated 4 years ago
- PipeProof☆11Updated 5 years ago
- ☆9Updated 9 years ago
- Testing processors with Random Instruction Generation☆44Updated 3 weeks ago
- Code repository for Coppelia tool☆23Updated 4 years ago
- Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)☆36Updated 4 years ago
- A Modular Open-Source Hardware Fuzzing Framework☆33Updated 3 years ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆81Updated this week
- BTOR2 MLIR project☆26Updated last year
- CHERI-RISC-V model written in Sail☆61Updated 3 weeks ago
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 6 years ago
- An executable specification of the RISCV ISA in L3.☆42Updated 6 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆25Updated last month
- rfuzz: coverage-directed fuzzing for RTL research platform☆108Updated 3 years ago
- All the tools you need to reproduce the CellIFT paper experiments☆21Updated 5 months ago
- A Modeling and Verification Platform for SoCs using ILAs☆78Updated last year
- The SoC used for the beta phase of Hack@DAC 2018.☆17Updated 5 years ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆85Updated last month
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆14Updated 3 years ago
- ☆36Updated 6 years ago
- A formalization of the RVWMO (RISC-V) memory model☆34Updated 3 years ago
- CoreIR Symbolic Analyzer☆73Updated 4 years ago
- ☆20Updated 5 years ago
- ☆19Updated last year
- A fault-injection framework using Chisel and FIRRTL☆36Updated 2 months ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆22Updated last month
- Tool for inferring cache replacement policies with automata learning. Uses LearnLib and Sketch.☆16Updated 5 years ago
- Memory consistency model checking and test generation library.☆15Updated 8 years ago