synxlin / mips-cpu
The Verilog implementation of five-stage-pipelined MIPS CPU (Classic RISC pipeline)
☆19Updated 8 months ago
Alternatives and similar repositories for mips-cpu:
Users that are interested in mips-cpu are comparing it to the libraries listed below
- A softcore microprocessor of MIPS32 architecture.☆39Updated 9 months ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆47Updated last year
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…☆34Updated 3 years ago
- ☆34Updated 5 years ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆38Updated last year
- nscscc2018☆26Updated 6 years ago
- An out-of-order execution algorithm for pipeline CPU, implemented by verilog☆39Updated 7 years ago
- 一个支持AXI总线、支持Cache、包括所有非浮点MIPS 1指令、支持例外的静态五级流水MIPS CPU☆10Updated 5 years ago
- 奋战一学期，造台计算机（编译出的bit文件在release中，可以直接食用）☆126Updated 5 years ago
- BOOM's Simulation Accelerator.☆13Updated 3 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- ☆11Updated 3 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆51Updated 4 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Updated 5 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- Introduction to Computer Systems (II), Spring 2021☆50Updated 3 years ago
- all kind of notes, I maybe sort this in the future☆10Updated last month
- Computer System Project for Loongson FPGA Board in 2017☆52Updated 6 years ago
- 我的一生一芯项目☆16Updated 3 years ago
- 中国科学院大学高级计算机体系结构课程作业：使用OpenROAD-flow完成RTL到GDS全流程☆24Updated 4 years ago
- Ventus GPGPU ISA Simulator Based on Spike☆42Updated last month
- A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …☆38Updated last year
- A Toy-Purpose TPU Simulator☆15Updated 9 months ago
- GPGPU-SIM 使用篇☆13Updated 2 years ago
- Naïve MIPS32 SoC implementation☆113Updated 4 years ago
- Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus☆24Updated this week
- 《自己动手写CPU》一书附带的文件☆80Updated 7 years ago
- ☆22Updated 2 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆22Updated 11 months ago
- cycle accurate Network-on-Chip Simulator☆27Updated last year