stffrdhrn / uartLinks
Verilog uart receiver and transmitter modules for De0 Nano
☆18Updated 11 years ago
Alternatives and similar repositories for uart
Users that are interested in uart are comparing it to the libraries listed below
Sorting:
- IP submodules, formatted for easier CI integration☆31Updated 4 months ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆32Updated 5 years ago
- A ZipCPU SoC for the Nexys Video board supporting video functionality☆20Updated last year
- Wishbone controlled I2C controllers☆57Updated last year
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆83Updated 5 years ago
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆30Updated 5 years ago
- USB Full Speed PHY☆48Updated 5 years ago
- USB capture IP☆25Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated 3 weeks ago
- Wishbone to AXI bridge (VHDL)☆44Updated 6 years ago
- Ethernet MAC 10/100 Mbps☆31Updated 4 years ago
- ✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.☆38Updated last week
- Repository and Wiki for Chip Hack events.☆51Updated 4 years ago
- Time to Digital Converter (TDC)☆36Updated 5 years ago
- FPGA board-level debugging and reverse-engineering tool☆39Updated 2 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 10 years ago
- FT2232HL JTAG & UART Downloader☆20Updated 4 years ago
- Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)☆35Updated last year
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆70Updated last month
- Using VexRiscv without installing Scala☆39Updated 4 years ago
- USB serial device (CDC-ACM)☆44Updated 5 years ago
- Tools for FPGA development.☆49Updated 6 months ago
- A collection of debugging busses developed and presented at zipcpu.com☆42Updated 2 years ago
- Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah…☆41Updated last year
- Digital FM Radio Receiver for FPGA☆64Updated 10 years ago
- Wishbone interconnect utilities☆44Updated last month
- A wishbone controlled PWM (audio) controller☆18Updated 2 years ago
- VHDL PCIe Transceiver☆32Updated 5 years ago
- AES☆15Updated 3 years ago
- Another tiny RISC-V implementation☆64Updated 4 years ago