mmicko / enigmaFPGALinks
Enigma in FPGA
☆29Updated 6 years ago
Alternatives and similar repositories for enigmaFPGA
Users that are interested in enigmaFPGA are comparing it to the libraries listed below
Sorting:
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆45Updated 3 years ago
- Repository and Wiki for Chip Hack events.☆51Updated 4 years ago
- SoftCPU/SoC engine-V☆55Updated 10 months ago
- ☆61Updated 2 years ago
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆54Updated 4 years ago
- Open Processor Architecture☆26Updated 9 years ago
- Tools and Examples for IcoBoard☆80Updated 4 years ago
- FPGA 101 - Workshop materials☆78Updated 6 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated 2 weeks ago
- A cross platform, formally verified, open source, hyperRAM controller with simulator☆14Updated 6 years ago
- Tools for FPGA development.☆49Updated 5 months ago
- Yosys Plugins☆22Updated 6 years ago
- A simple GPU on a TinyFPGA BX☆81Updated 7 years ago
- understanding the tinyfpga bootloader☆25Updated 7 years ago
- CMod-S6 SoC☆45Updated 8 years ago
- Acorn Atom in minimal configuration for iCE40 HX8K board and ICOboard☆11Updated 2 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 7 years ago
- Generic Logic Interfacing Project☆48Updated 5 years ago
- A very simple UART implementation in MyHDL☆17Updated 11 years ago
- FPGA USB 1.1 Low-Speed Implementation☆35Updated 7 years ago
- A reimplementation of a tiny stack CPU☆86Updated 2 years ago
- This is a simple UART echo test for the iCEstick Evaluation Kit☆39Updated 7 years ago
- IP cores for the FPGA Libre project☆12Updated 8 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆71Updated 3 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- Using VexRiscv without installing Scala☆39Updated 4 years ago
- OpenFPGA☆34Updated 7 years ago
- PanoLogic Zero Client G1 reverse engineering info☆75Updated last year
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA