freecores / mmuart
Simple RS232 UART
☆12Updated 8 years ago
Related projects ⓘ
Alternatives and complementary repositories for mmuart
- PS2 interface☆17Updated 6 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 4 years ago
- WISHBONE Builder☆13Updated 8 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- Simplified environment for litex☆13Updated 4 years ago
- Client for JTAG programmer for AVR microcontrollers☆14Updated 9 months ago
- USB 1.1 Device IP Core☆18Updated 7 years ago
- ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)☆22Updated last week
- An example OMI Device FPGA with 2 DDR4 memory ports☆15Updated last year
- 🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.☆22Updated 2 years ago
- IP submodules, formatted for easier CI integration☆28Updated last year
- Freecores website☆19Updated 7 years ago
- Small footprint and configurable Inter-Chip communication cores☆54Updated last month
- iCE40 floorplan viewer☆24Updated 6 years ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- Ethernet MAC 10/100 Mbps☆24Updated 3 years ago
- Bit streams forthe Ulx3s ECP5 device☆16Updated last year
- A configurable USB 2.0 device core☆30Updated 4 years ago
- Use ECP5 JTAG port to interact with user design☆24Updated 3 years ago
- WCH CH569 SerDes Reverse Engineering☆25Updated 2 years ago
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆27Updated 4 years ago
- Using VexRiscv without installing Scala☆36Updated 3 years ago
- SD device emulator from ProjectVault☆14Updated 5 years ago
- System on Chip toolkit for nMigen☆20Updated 4 years ago
- FPGA implementation of DSITx (single lane) used in conjunction with ipod nano 7th gen display☆18Updated 6 years ago
- USB Full-Speed core written in migen/LiteX☆17Updated 5 years ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆16Updated 8 months ago
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆25Updated 5 years ago
- ☆18Updated 4 years ago