Alternatives and similar repositories for LoAS

Users that are interested in LoAS are comparing it to the libraries listed below

• dubcyfor3 / Prosperity
  The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity
  ☆36Updated last month
• RuokaiYin / SATA_Sim
  SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…
  ☆28Updated 11 months ago
• booniebears / CoMN
  ☆18Updated last year
• shieldforever / NeuronQuant
  [ASP-DAC 2025] "NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks" Official Implementation
  ☆11Updated 6 months ago
• arkhodamoradi / s2n2
  ☆17Updated 4 years ago
• DanielGerlinghoff / radix-encoding
  Framework for radix encoded SNN on FPGA
  ☆14Updated 3 years ago
• Intelligent-Computing-Lab-Panda / SpikeSim
  ☆38Updated last year
• adamgallas / FireFly-v2
  [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…
  ☆20Updated last year
• QianpengLi577 / Neuromorphic-Processor-paper-list
  I will share some useful or interesting papers about neuromorphic processor
  ☆27Updated 7 months ago
• SNU-HPCS / NeuroSync
  NeuroSync: A Scalable and Accurate Brain Simulation System using Safe and Efficient Speculation (HPCA 2022)
  ☆12Updated 2 years ago
• Intelligent-Computing-Lab-Panda / SATA
  An energy simulation framework for BPTT-based SNN inference and training.
  ☆16Updated 2 years ago
• RuokaiYin / MINT_Quantization
  MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award
  ☆15Updated last year
• hyupupup / conv_systolic_array
  (Verilog) A simple convolution layer implementation with systolic array structure
  ☆12Updated 3 years ago
• adamsolomou / SC-DNN
  Stochastic Computing for Deep Neural Networks
  ☆33Updated 4 years ago
• ChFrenkel / ReckOn
  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
  ☆86Updated 3 years ago
• adamgallas / FireFly-v1
  [TVLSI'23] This repository contains the source code for the paper "FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Net…
  ☆20Updated last year
• Zhu-Zixuan / Bitlet-PE
  A bit-level sparsity-awared multiply-accumulate process element.
  ☆16Updated last year
• SFU-HiAccel / SyncNN
  [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
  ☆60Updated 4 years ago
• oshears / SNN-FPGA-Implementation
  ☆19Updated 4 years ago
• mean9park / BitFusion-verilog
  bitfusion verilog implementation
  ☆12Updated 3 years ago
• neurosim / DNN_NeuroSim_V1.4
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆73Updated 6 months ago
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• snagiri / CSE237D-PYNQ-SNN-Accelerator
  Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board
  ☆38Updated 6 years ago
• ECASLab / hls-fpga-accelerators
  Collection of kernel accelerators optimised for LLM execution
  ☆22Updated 5 months ago
• fffasttime / AnyPackingNet
  ☆28Updated 5 months ago
• zwhexplorer / Spiking-Neural-Network-Accelerator-EE552-project
  Spiking Neural Network Accelerator
  ☆15Updated 3 years ago
• puccinic / Transformer_dataflow
  C++ code for HLS FPGA implementation of transformer
  ☆18Updated last year
• githubofaliyev / SNN-DSE
  Hardware and software implementation of Sparsely-active SNNs
  ☆18Updated 8 months ago
• sweetwenwen / Stochastic-computing-based-neural-network-accelerator
  ☆11Updated 5 years ago
• isakedo / DNNsim
  ☆35Updated 5 years ago