Alternatives and similar repositories for LoAS:

Users that are interested in LoAS are comparing it to the libraries listed below

• shieldforever / NeuronQuant
  [ASP-DAC 2025] "NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks" Official Implementation
  ☆10Updated 3 weeks ago
• booniebears / CoMN
  ☆15Updated 10 months ago
• RuokaiYin / SATA_Sim
  SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…
  ☆26Updated 6 months ago
• arkhodamoradi / s2n2
  ☆17Updated 4 years ago
• CASR-HKU / AGNA-FCCM2023
  ☆12Updated last year
• adamgallas / FireFly-v2
  [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…
  ☆16Updated 10 months ago
• SNU-HPCS / NeuroSync
  NeuroSync: A Scalable and Accurate Brain Simulation System using Safe and Efficient Speculation (HPCA 2022)
  ☆10Updated 2 years ago
• adamgallas / FireFly-v1
  [TVLSI'23] This repository contains the source code for the paper "FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Net…
  ☆17Updated 11 months ago
• dubcyfor3 / Prosperity
  The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity
  ☆22Updated 2 months ago
• oshears / SNN-FPGA-Implementation
  ☆16Updated 3 years ago
• fffasttime / AnyPackingNet
  ☆26Updated 3 months ago
• sjtu-zhao-lab / SALO
  An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences
  ☆25Updated last year
• DanielGerlinghoff / radix-encoding
  Framework for radix encoded SNN on FPGA
  ☆13Updated 3 years ago
• BaoBao-zhu / RV-SCNN
  A Custom RISC-V Instruction Extension for SNN and CNN Computation
  ☆12Updated 7 months ago
• hyupupup / conv_systolic_array
  (Verilog) A simple convolution layer implementation with systolic array structure
  ☆12Updated 2 years ago
• KULeuven-MICAS / zigzag-imc
  HW accelerator mapping optimization framework for in-memory computing
  ☆22Updated 2 months ago
• gkrish19 / SIAM-Chiplet-based-Scalable-In-Memory-Acceleration-with-Mesh-for-Deep-Neural-Networks
  A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.
  ☆20Updated 9 months ago
• RuokaiYin / MINT_Quantization
  MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award
  ☆12Updated 11 months ago
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• Zhu-Zixuan / Bitlet-PE
  A bit-level sparsity-awared multiply-accumulate process element.
  ☆14Updated 8 months ago
• sweetwenwen / Stochastic-computing-based-neural-network-accelerator
  ☆9Updated 5 years ago
• QianpengLi577 / Neuromorphic-Processor-paper-list
  I will share some useful or interesting papers about neuromorphic processor
  ☆20Updated last month
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• neurosim / DNN_NeuroSim_V1.4
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆61Updated 2 weeks ago
• neurosim / DNN_NeuroSim_V2.0
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆47Updated 3 years ago
• CRAFT-THU / XB-Sim
  A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration
  ☆34Updated 2 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆48Updated last month
• nimish15shah / DAG_Processor
  A DAG processor and compiler for a tree-based spatial datapath.
  ☆13Updated 2 years ago
• adam-smnk / Open-CIM-Compiler
  ☆28Updated 3 years ago
• arc-research-lab / SSR
  SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
  ☆30Updated this week